Basic code for mk20dx256vlh7 flashing
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1acbc97e98
commit
02b919a4cb
@ -101,6 +101,7 @@ static int dfu_handle_control( struct usb_ctrl_req_t *req, void *data )
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goto out_no_status;
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}
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case USB_CTRL_REQ_DFU_UPLOAD: {
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/*
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void *buf;
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size_t len = 0;
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@ -141,6 +142,8 @@ static int dfu_handle_control( struct usb_ctrl_req_t *req, void *data )
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}
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goto out_no_status;
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*/
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return 0;
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}
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case USB_CTRL_REQ_DFU_GETSTATUS: {
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struct dfu_status_t st;
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@ -149,43 +152,6 @@ static int dfu_handle_control( struct usb_ctrl_req_t *req, void *data )
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st.bStatus = ctx->status;
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st.bwPollTimeout = 1000; /* XXX */
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// XXX FAKE WRITE
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if ( ctx->state == DFU_STATE_dfuMANIFEST )
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{
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uint8_t data[] = { 0x10, 0x20, 0x30, 0x40 };
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flash_program_longword((uintptr_t)&_app_rom, data);
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}
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/*
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uint32_t *position = &_app_rom + 0x100;
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for ( ; position < &_app_rom + 0x200; position++ )
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//for ( ; position < &_app_rom + 0x800; position++ )
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{
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if ( *position != 0xFFFFFFFF )
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{
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while( 1 )
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{
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GPIOA_PTOR |= (1<<5);
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for (uint32_t d = 0; d < 7200000; d++ );
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}
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}
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}*/
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// Check to see if vector table was flashed correctly
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// Return a flash error if it was not
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if (_app_rom == 0xffffffff && ctx->state == DFU_STATE_dfuMANIFEST)
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st.bStatus = DFU_STATUS_errPROG;
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//}
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/*
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if (ctx->state == DFU_STATE_dfuMANIFEST)
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{
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uint8_t *addr = (uint8_t*)_app_rom;
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//while (*(addr++) != 0x80);
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//st.bStatus = DFU_STATUS_errPROG;
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st.bStatus = (uint8_t)((uint32_t)(&_app_rom) >> 16);
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}
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*/
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/**
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* If we're in DFU_STATE_dfuMANIFEST, we just finished
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* the download, and we're just about to send our last
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@ -61,7 +61,7 @@ static const struct usb_config_1 usb_config_1 = {
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},
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.will_detach = 1,
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.manifestation_tolerant = 0,
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.can_upload = 1,
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.can_upload = 0,
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.can_download = 1,
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.wDetachTimeOut = 0,
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.wTransferSize = USB_DFU_TRANSFER_SIZE,
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@ -30,7 +30,15 @@
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#ifndef USB_DFU_TRANSFER_SIZE
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// Sector size is the same as the program flash size
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#if defined(_mk20dx128vlf5_)
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#define USB_DFU_TRANSFER_SIZE FLASH_SECTOR_SIZE
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// Sector size is double the program flash size
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#elif defined(_mk20dx256vlh7_ )
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#define USB_DFU_TRANSFER_SIZE FLASH_SECTOR_SIZE / 2
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#endif
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#endif
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#define USB_FUNCTION_DESC_DFU_DECL \
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@ -31,7 +31,7 @@ uint32_t flash_ALLOW_BRICKABLE_ADDRESSES;
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/* This will have to live in SRAM. */
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__attribute__((section(".ramtext.ftfl_submit_cmd"), long_call))
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int ftfl_submit_cmd(void)
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int ftfl_submit_cmd()
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{
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FTFL.fstat.raw = ((struct FTFL_FSTAT_t){
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.ccif = 1,
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@ -49,10 +49,11 @@ int ftfl_submit_cmd(void)
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//return (!!stat.mgstat0);
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}
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int flash_prepare_flashing(void)
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int flash_prepare_flashing()
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{
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/* switch to FlexRAM */
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if (!FTFL.fcnfg.ramrdy) {
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if ( !FTFL.fcnfg.ramrdy )
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{
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FTFL.fccob.set_flexram.fcmd = FTFL_FCMD_SET_FLEXRAM;
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FTFL.fccob.set_flexram.flexram_function = FTFL_FLEXRAM_RAM;
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return (ftfl_submit_cmd());
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@ -60,14 +61,24 @@ int flash_prepare_flashing(void)
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return (0);
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}
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int flash_read_1s_sector( uintptr_t addr, size_t num )
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{
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FTFL.fccob.read_1s_section.fcmd = FTFL_FCMD_READ_1s_SECTION;
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FTFL.fccob.read_1s_section.addr = addr;
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FTFL.fccob.read_1s_section.margin = FTFL_MARGIN_NORMAL;
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FTFL.fccob.read_1s_section.num_words = num;
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return ftfl_submit_cmd();
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}
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int flash_erase_sector( uintptr_t addr )
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{
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if (addr < (uintptr_t)&_app_rom &&
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flash_ALLOW_BRICKABLE_ADDRESSES != 0x00023420)
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if ( addr < (uintptr_t)&_app_rom && flash_ALLOW_BRICKABLE_ADDRESSES != 0x00023420 )
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return (-1);
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FTFL.fccob.erase.fcmd = FTFL_FCMD_ERASE_SECTOR;
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FTFL.fccob.erase.addr = addr;
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return (ftfl_submit_cmd());
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return ftfl_submit_cmd();
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}
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int flash_program_section_longwords( uintptr_t addr, size_t num_words )
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@ -88,40 +99,31 @@ int flash_program_section_phrases(uintptr_t addr, size_t num_phrases)
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return ftfl_submit_cmd();
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}
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int flash_program_longword(uintptr_t addr, uint8_t *data)
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{
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FTFL.fccob.program_longword.fcmd = FTFL_FCMD_PROGRAM_LONGWORD;
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FTFL.fccob.program_longword.addr = addr;
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FTFL.fccob.program_longword.data_be[0] = data[0];
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FTFL.fccob.program_longword.data_be[1] = data[1];
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FTFL.fccob.program_longword.data_be[2] = data[2];
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FTFL.fccob.program_longword.data_be[3] = data[3];
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return ftfl_submit_cmd();
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}
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int flash_program_sector( uintptr_t addr, size_t len )
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{
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#if defined(_mk20dx128vlf5_)
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return (len != FLASH_SECTOR_SIZE ||
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(addr & (FLASH_SECTOR_SIZE - 1)) != 0 ||
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flash_erase_sector(addr) ||
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flash_program_section_longwords(addr, FLASH_SECTOR_SIZE / 4));
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return (len != FLASH_SECTOR_SIZE
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|| (addr & (FLASH_SECTOR_SIZE - 1)) != 0
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|| flash_erase_sector( addr )
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|| flash_program_section_longwords( addr, FLASH_SECTOR_SIZE / 4 ));
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#elif defined(_mk20dx256vlh7_)
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/*
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return (len != FLASH_SECTOR_SIZE ||
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(addr & (FLASH_SECTOR_SIZE - 1)) != 0 ||
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flash_erase_sector(addr) ||
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flash_program_section_phrases(addr, FLASH_SECTOR_SIZE / 8));
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*/
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return (len != FLASH_SECTOR_SIZE ||
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(addr & (FLASH_SECTOR_SIZE - 1)) != 0 ||
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flash_erase_sector(addr) ||
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flash_program_section_phrases(addr, FLASH_SECTOR_SIZE / 8));
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if ( len != FLASH_SECTOR_SIZE )
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return 1;
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// Check if beginning of sector and erase if not empty
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// Each sector is 2 kB in length, but we can only write to half a sector at a time
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// We can only erase an entire sector at a time
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if ( (addr & (FLASH_SECTOR_SIZE - 1)) == 0
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&& flash_read_1s_sector( addr, FLASH_SECTOR_SIZE / 8 )
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&& flash_erase_sector( addr ) )
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return 1;
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// Program half-sector
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return flash_program_section_phrases( addr, FLASH_SECTOR_SIZE / 16 );
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#endif
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}
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int flash_prepare_reading(void)
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int flash_prepare_reading()
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{
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return (0);
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}
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@ -133,8 +135,7 @@ int flash_read_sector(uintptr_t addr, size_t len)
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void *flash_get_staging_area( uintptr_t addr, size_t len )
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{
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if ((addr & (FLASH_SECTOR_SIZE - 1)) != 0 ||
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len != FLASH_SECTOR_SIZE)
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if ( (addr & (FLASH_SECTOR_SIZE - 1)) != 0 || len != FLASH_SECTOR_SIZE )
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return (NULL);
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return (FlexRAM);
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}
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@ -30,7 +30,7 @@
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/**
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* Unfortunately we can't DMA directly to FlexRAM, so we'll have to stage here.
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*/
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static char staging[ FLASH_SECTOR_SIZE ];
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static char staging[ USB_DFU_TRANSFER_SIZE ];
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@ -42,6 +42,13 @@ void sector_print( void* buf, size_t sector, size_t chunks )
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uint8_t* end = (uint8_t*)buf + (sector + 1) * USB_DFU_TRANSFER_SIZE;
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uint8_t* pos = start;
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// Verify if sector erased
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FTFL.fccob.read_1s_section.fcmd = FTFL_FCMD_READ_1s_SECTION;
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FTFL.fccob.read_1s_section.addr = (uintptr_t)start;
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FTFL.fccob.read_1s_section.margin = FTFL_MARGIN_NORMAL;
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FTFL.fccob.read_1s_section.num_words = 250; // 2000 kB / 64 bits
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int retval = ftfl_submit_cmd();
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print( NL );
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print("Block ");
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printHex( sector );
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@ -49,6 +56,8 @@ void sector_print( void* buf, size_t sector, size_t chunks )
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printHex( (size_t)start );
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print(" -> ");
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printHex( (size_t)end );
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print(" Erased: ");
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printHex( retval );
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print( NL );
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// Display sector
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@ -56,7 +65,7 @@ void sector_print( void* buf, size_t sector, size_t chunks )
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{
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// Each Line
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printHex_op( (size_t)pos, 4 );
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print(" ");
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print(": ");
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// Each 2 byte chunk
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for ( size_t chunk = 0; chunk < chunks; chunk++ )
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@ -78,12 +87,16 @@ static enum dfu_status setup_read( size_t off, size_t *len, void **buf )
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*buf = (void*)&_app_rom + (USB_DFU_TRANSFER_SIZE / 4) * off;
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// Calculate length of transfer
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/*
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*len = *buf > (void*)(&_app_rom_end) - USB_DFU_TRANSFER_SIZE
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? 0 : USB_DFU_TRANSFER_SIZE;
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*/
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// Check for error
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/*
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if ( *buf > (void*)&_app_rom_end )
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return (DFU_STATUS_errADDRESS);
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*/
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return (DFU_STATUS_OK);
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}
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@ -174,11 +187,6 @@ void main()
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uart_serial_setup();
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printNL( NL "Bootloader DFU-Mode" );
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// TODO REMOVEME
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for ( uint8_t sector = 0; sector < 3; sector++ )
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sector_print( &_app_rom, sector, 16 );
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print( NL );
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// XXX REMOVEME
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/*
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GPIOB_PDDR |= (1<<16);
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@ -196,6 +204,7 @@ void main()
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GPIOC_PCOR |= (1<<4);
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*/
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// Backlight
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/*
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GPIOC_PDDR |= (1<<1);
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PORTC_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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GPIOC_PCOR |= (1<<1);
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@ -205,6 +214,90 @@ void main()
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GPIOC_PDDR |= (1<<3);
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PORTC_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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GPIOC_PCOR |= (1<<3);
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*/
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/*
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// Read Firmware 1 Status
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FTFL.fccob.read_1s_block.fcmd = FTFL_FCMD_READ_1s_BLOCK;
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FTFL.fccob.read_1s_block.addr = (uintptr_t)&_app_rom;
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FTFL.fccob.read_1s_block.margin = FTFL_MARGIN_NORMAL;
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int retval = ftfl_submit_cmd();
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print("Firmware Erase Status: ");
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printHex( retval );
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print( NL );
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// Read Bootloader 1 Status
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FTFL.fccob.read_1s_block.fcmd = FTFL_FCMD_READ_1s_BLOCK;
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FTFL.fccob.read_1s_block.addr = (uintptr_t)&_bootloader;
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FTFL.fccob.read_1s_block.margin = FTFL_MARGIN_NORMAL;
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retval = ftfl_submit_cmd();
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print("Bootloader Erase Status: ");
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printHex( retval );
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print( NL );
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*/
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/*
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// Program First Longword of firmware
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FTFL.fccob.program_longword.fcmd = FTFL_FCMD_PROGRAM_LONGWORD;
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FTFL.fccob.program_longword.addr = (uintptr_t)&_app_rom;
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FTFL.fccob.program_longword.data_be[0] = 0x1;
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FTFL.fccob.program_longword.data_be[1] = 0x2;
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FTFL.fccob.program_longword.data_be[2] = 0x4;
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FTFL.fccob.program_longword.data_be[3] = 0x8;
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int retval = ftfl_submit_cmd();
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print("Write Longword Status: ");
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printHex( retval );
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print( NL );
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*/
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/*
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// Erase Sector
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FTFL.fccob.erase.fcmd = FTFL_FCMD_ERASE_SECTOR;
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FTFL.fccob.erase.addr = (uintptr_t)&_app_rom;
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int retval = ftfl_submit_cmd();
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print("Erase Status: ");
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printHex( retval );
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print( NL );
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// Prepare FlexRAM
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FTFL.fccob.set_flexram.fcmd = FTFL_FCMD_SET_FLEXRAM;
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FTFL.fccob.set_flexram.flexram_function = FTFL_FLEXRAM_RAM;
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retval = ftfl_submit_cmd();
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print("Set FlexRAM Status: ");
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printHex( retval );
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print( NL );
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// Write to FlexRAM
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memset( FlexRAM, 0xB4, 1000 );
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memset( &FlexRAM[1000], 0xE3, 1000 );
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// Program Sector
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FTFL.fccob.program_section.fcmd = FTFL_FCMD_PROGRAM_SECTION;
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FTFL.fccob.program_section.addr = (uintptr_t)&_app_rom;
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FTFL.fccob.program_section.num_words = 128;
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//FTFL.fccob.program_section.num_words = 250; // 2000 kb / 64 bits
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retval = ftfl_submit_cmd();
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print("Program Sector1 Status: ");
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printHex( retval );
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print( NL );
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FTFL.fccob.program_section.fcmd = FTFL_FCMD_PROGRAM_SECTION;
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FTFL.fccob.program_section.addr = (uintptr_t)&_app_rom + 0x400;
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FTFL.fccob.program_section.num_words = 128;
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//FTFL.fccob.program_section.num_words = 250; // 2000 kb / 64 bits
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retval = ftfl_submit_cmd();
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print("Program Sector2 Status: ");
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printHex( retval );
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print( NL );
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for ( uint8_t sector = 0; sector < 1; sector++ )
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//sector_print( &_bootloader, sector, 16 );
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sector_print( &_app_rom, sector, 16 );
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print( NL );
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*/
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flash_prepare_flashing();
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@ -37,7 +37,7 @@
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#include "mchck-cdefs.h"
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extern uint32_t _sidata, _sdata, _edata, _sbss, _ebss, _app_rom, _app_rom_end;
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extern uint32_t _sidata, _sdata, _edata, _sbss, _ebss, _app_rom, _app_rom_end, _bootloader;
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#include "ftfl.h"
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#include "usbotg.h"
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@ -33,13 +33,12 @@ MEMORY
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{
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FLASH (rx) : ORIGIN = 0x0, LENGTH = 256K
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FLASH_APP (rx) : ORIGIN = 8K, LENGTH = 256K-8K
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FLASH_END (r) : ORIGIN = 256K, LENGTH = 32
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RAM (rwx) : ORIGIN = 0x20000000 - 64K / 2, LENGTH = 64K
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}
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/* Starting Address of the application ROM */
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_bootloader = ORIGIN( FLASH );
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_app_rom = ORIGIN( FLASH_APP );
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_app_rom_end = ORIGIN( FLASH_END );
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FlexRAM = 0x14000000;
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FTFL = 0x40020000;
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@ -43,6 +43,7 @@ SECTIONS
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. = 0;
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KEEP(* (.vectors))
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*(.startup*)
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. = 0x400; KEEP(* (.flashconfig)) /* MUST BE AT 0x400 */
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*(.text*)
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*(.rodata*)
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. = ALIGN(4);
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