Initial import of Teensyduino 1.8rc2 (for Teensy 3.1 Support).
This commit is contained in:
Jacob Alexander
parent
cd59498972
commit
71268de9d1
355
Lib/mk20dx128.c
355
Lib/mk20dx128.c
@ -1,3 +1,33 @@
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/* Teensyduino Core Library
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* http://www.pjrc.com/teensy/
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* Copyright (c) 2013 PJRC.COM, LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* 1. The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* 2. If the Software is incorporated into a build system that allows
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* selection among a list of target devices, then similar target
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* devices manufactured by PJRC.COM must be included in the list of
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* target devices and selectable in the same manner.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "mk20dx128.h"
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@ -18,12 +48,19 @@ void __libc_init_array(void);
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void fault_isr(void)
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{
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while (1); // die
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while (1) {
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// keep polling some communication while in fault
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// mode, so we don't completely die.
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if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr();
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if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr();
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if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr();
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if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr();
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}
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}
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void unused_isr(void)
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{
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while (1); // die
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fault_isr();
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}
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extern volatile uint32_t systick_millis_count;
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@ -46,14 +83,38 @@ void dma_ch0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch2_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch3_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch4_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch5_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch6_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch7_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch8_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch9_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch10_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch11_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch12_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch13_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch14_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_ch15_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dma_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void mcm_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void flash_cmd_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void flash_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void low_voltage_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void wakeup_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void watchdog_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void i2c0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void i2c1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void i2c2_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void spi0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void spi1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void spi2_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void sdhc_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void can0_message_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void can0_bus_off_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void can0_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void can0_tx_warn_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void can0_rx_warn_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void can0_wakeup_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void i2s0_tx_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void i2s0_rx_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart0_lon_isr(void) __attribute__ ((weak, alias("unused_isr")));
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@ -63,11 +124,21 @@ void uart1_status_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart1_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart2_status_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart2_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart3_status_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart3_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart4_status_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart4_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart5_status_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void uart5_error_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void adc0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void adc1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void cmp0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void cmp1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void cmp2_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void ftm0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void ftm1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void ftm2_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void ftm3_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void cmt_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void rtc_alarm_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void rtc_seconds_isr(void) __attribute__ ((weak, alias("unused_isr")));
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@ -78,6 +149,8 @@ void pit3_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void pdb_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void usb_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void usb_charge_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dac0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void dac1_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void tsi0_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void mcg_isr(void) __attribute__ ((weak, alias("unused_isr")));
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void lptmr_isr(void) __attribute__ ((weak, alias("unused_isr")));
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@ -94,8 +167,8 @@ void software_isr(void) __attribute__ ((weak, alias("unused_isr")));
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__attribute__ ((section(".vectors"), used))
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void (* const gVectors[])(void) =
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{
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(void (*)(void))((unsigned long)&_estack), // 0 ARM: Initial Stack Pointer
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ResetHandler, // 1 ARM: Initial Program Counter
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(void (*)(void))((unsigned long)&_estack), // 0 ARM: Initial Stack Pointer
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ResetHandler, // 1 ARM: Initial Program Counter
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nmi_isr, // 2 ARM: Non-maskable Interrupt (NMI)
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hard_fault_isr, // 3 ARM: Hard Fault
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memmanage_fault_isr, // 4 ARM: MemManage Fault
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@ -110,6 +183,7 @@ void (* const gVectors[])(void) =
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fault_isr, // 13 --
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pendablesrvreq_isr, // 14 ARM: Pendable req serv(PendableSrvReq)
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systick_isr, // 15 ARM: System tick timer (SysTick)
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#if defined(_mk20dx128_)
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dma_ch0_isr, // 16 DMA channel 0 transfer complete
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dma_ch1_isr, // 17 DMA channel 1 transfer complete
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dma_ch2_isr, // 18 DMA channel 2 transfer complete
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@ -156,6 +230,103 @@ void (* const gVectors[])(void) =
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portd_isr, // 59 Pin detect (Port D)
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porte_isr, // 60 Pin detect (Port E)
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software_isr, // 61 Software interrupt
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#elif defined(_mk20dx256_)
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dma_ch0_isr, // 16 DMA channel 0 transfer complete
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dma_ch1_isr, // 17 DMA channel 1 transfer complete
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dma_ch2_isr, // 18 DMA channel 2 transfer complete
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dma_ch3_isr, // 19 DMA channel 3 transfer complete
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dma_ch4_isr, // 20 DMA channel 4 transfer complete
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dma_ch5_isr, // 21 DMA channel 5 transfer complete
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dma_ch6_isr, // 22 DMA channel 6 transfer complete
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dma_ch7_isr, // 23 DMA channel 7 transfer complete
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dma_ch8_isr, // 24 DMA channel 8 transfer complete
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dma_ch9_isr, // 25 DMA channel 9 transfer complete
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dma_ch10_isr, // 26 DMA channel 10 transfer complete
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dma_ch11_isr, // 27 DMA channel 10 transfer complete
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dma_ch12_isr, // 28 DMA channel 10 transfer complete
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dma_ch13_isr, // 29 DMA channel 10 transfer complete
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dma_ch14_isr, // 30 DMA channel 10 transfer complete
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dma_ch15_isr, // 31 DMA channel 10 transfer complete
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dma_error_isr, // 32 DMA error interrupt channel
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unused_isr, // 33 --
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flash_cmd_isr, // 34 Flash Memory Command complete
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flash_error_isr, // 35 Flash Read collision
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low_voltage_isr, // 36 Low-voltage detect/warning
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wakeup_isr, // 37 Low Leakage Wakeup
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watchdog_isr, // 38 Both EWM and WDOG interrupt
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unused_isr, // 39 --
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i2c0_isr, // 40 I2C0
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i2c1_isr, // 41 I2C1
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spi0_isr, // 42 SPI0
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spi1_isr, // 43 SPI1
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unused_isr, // 44 --
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can0_message_isr, // 45 CAN OR'ed Message buffer (0-15)
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can0_bus_off_isr, // 46 CAN Bus Off
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can0_error_isr, // 47 CAN Error
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can0_tx_warn_isr, // 48 CAN Transmit Warning
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can0_rx_warn_isr, // 49 CAN Receive Warning
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can0_wakeup_isr, // 50 CAN Wake Up
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i2s0_tx_isr, // 51 I2S0 Transmit
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i2s0_rx_isr, // 52 I2S0 Receive
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unused_isr, // 53 --
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unused_isr, // 54 --
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unused_isr, // 55 --
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unused_isr, // 56 --
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unused_isr, // 57 --
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unused_isr, // 58 --
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unused_isr, // 59 --
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uart0_lon_isr, // 60 UART0 CEA709.1-B (LON) status
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uart0_status_isr, // 61 UART0 status
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uart0_error_isr, // 62 UART0 error
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uart1_status_isr, // 63 UART1 status
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uart1_error_isr, // 64 UART1 error
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uart2_status_isr, // 65 UART2 status
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uart2_error_isr, // 66 UART2 error
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unused_isr, // 67 --
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unused_isr, // 68 --
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unused_isr, // 69 --
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unused_isr, // 70 --
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unused_isr, // 71 --
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unused_isr, // 72 --
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adc0_isr, // 73 ADC0
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adc1_isr, // 74 ADC1
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cmp0_isr, // 75 CMP0
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cmp1_isr, // 76 CMP1
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cmp2_isr, // 77 CMP2
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ftm0_isr, // 78 FTM0
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ftm1_isr, // 79 FTM1
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ftm2_isr, // 80 FTM2
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cmt_isr, // 81 CMT
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rtc_alarm_isr, // 82 RTC Alarm interrupt
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rtc_seconds_isr, // 83 RTC Seconds interrupt
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pit0_isr, // 84 PIT Channel 0
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pit1_isr, // 85 PIT Channel 1
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pit2_isr, // 86 PIT Channel 2
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pit3_isr, // 87 PIT Channel 3
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pdb_isr, // 88 PDB Programmable Delay Block
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usb_isr, // 89 USB OTG
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usb_charge_isr, // 90 USB Charger Detect
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unused_isr, // 91 --
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unused_isr, // 92 --
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unused_isr, // 93 --
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unused_isr, // 94 --
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unused_isr, // 95 --
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unused_isr, // 96 --
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dac0_isr, // 97 DAC0
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unused_isr, // 98 --
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tsi0_isr, // 99 TSI0
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mcg_isr, // 100 MCG
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lptmr_isr, // 101 Low Power Timer
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unused_isr, // 102 --
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porta_isr, // 103 Pin detect (Port A)
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portb_isr, // 104 Pin detect (Port B)
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portc_isr, // 105 Pin detect (Port C)
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portd_isr, // 106 Pin detect (Port D)
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porte_isr, // 107 Pin detect (Port E)
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unused_isr, // 108 --
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unused_isr, // 109 --
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software_isr, // 110 Software interrupt
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#endif
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};
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//void usb_isr(void)
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@ -173,13 +344,13 @@ const uint8_t flashconfigbytes[16] = {
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// time, and the user has added a crystal, the RTC will automatically
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// begin at the time of the first upload.
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#ifndef TIME_T
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#define TIME_T 1349049600 // default 1 Oct 2012
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#define TIME_T 1349049600 // default 1 Oct 2012 (never used, Arduino sets this)
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#endif
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extern void rtc_set(unsigned long t);
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void startup_unused_hook(void) {}
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static void startup_unused_hook(void) {}
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void startup_early_hook(void) __attribute__ ((weak, alias("startup_unused_hook")));
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void startup_late_hook(void) __attribute__ ((weak, alias("startup_unused_hook")));
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@ -187,8 +358,9 @@ void startup_late_hook(void) __attribute__ ((weak, alias("startup_unused_hook")
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__attribute__ ((section(".startup")))
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void ResetHandler(void)
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{
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uint32_t *src = &_etext;
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uint32_t *dest = &_sdata;
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uint32_t *src = &_etext;
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uint32_t *dest = &_sdata;
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unsigned int i;
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WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
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WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
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@ -196,68 +368,81 @@ void ResetHandler(void)
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startup_early_hook();
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// enable clocks to always-used peripherals
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#if defined(_mk20dx128_)
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SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO
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SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
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#elif defined(_mk20dx256_)
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SIM_SCGC3 = SIM_SCGC3_ADC1 | SIM_SCGC3_FTM2;
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SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO
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SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
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#endif
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// if the RTC oscillator isn't enabled, get it started early
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if (!(RTC_CR & RTC_CR_OSCE)) {
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RTC_SR = 0;
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RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
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}
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// release I/O pins hold, if we woke up from VLLS mode
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if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO;
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// TODO: do this while the PLL is waiting to lock....
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while (dest < &_edata) *dest++ = *src++;
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dest = &_sbss;
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while (dest < &_ebss) *dest++ = 0;
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while (dest < &_edata) *dest++ = *src++;
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dest = &_sbss;
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while (dest < &_ebss) *dest++ = 0;
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SCB_VTOR = 0; // use vector table in flash
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// start in FEI mode
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// enable capacitors for crystal
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OSC0_CR = OSC_SC8P | OSC_SC2P;
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// enable osc, 8-32 MHz range, low power mode
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MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;
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// switch to crystal as clock source, FLL input = 16 MHz / 512
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MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);
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// wait for crystal oscillator to begin
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while ((MCG_S & MCG_S_OSCINIT0) == 0) ;
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// wait for FLL to use oscillator
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while ((MCG_S & MCG_S_IREFST) != 0) ;
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// wait for MCGOUT to use oscillator
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while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;
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// now we're in FBE mode
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// config PLL input for 16 MHz Crystal / 4 = 4 MHz
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MCG_C5 = MCG_C5_PRDIV0(3);
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// config PLL for 96 MHz output
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MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);
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// wait for PLL to start using xtal as its input
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while (!(MCG_S & MCG_S_PLLST)) ;
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// wait for PLL to lock
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while (!(MCG_S & MCG_S_LOCK0)) ;
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// now we're in PBE mode
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// default all interrupts to medium priority level
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for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);
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// start in FEI mode
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// enable capacitors for crystal
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OSC0_CR = OSC_SC8P | OSC_SC2P;
|
||||
// enable osc, 8-32 MHz range, low power mode
|
||||
MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;
|
||||
// switch to crystal as clock source, FLL input = 16 MHz / 512
|
||||
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);
|
||||
// wait for crystal oscillator to begin
|
||||
while ((MCG_S & MCG_S_OSCINIT0) == 0) ;
|
||||
// wait for FLL to use oscillator
|
||||
while ((MCG_S & MCG_S_IREFST) != 0) ;
|
||||
// wait for MCGOUT to use oscillator
|
||||
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;
|
||||
// now we're in FBE mode
|
||||
// config PLL input for 16 MHz Crystal / 4 = 4 MHz
|
||||
MCG_C5 = MCG_C5_PRDIV0(3);
|
||||
// config PLL for 96 MHz output
|
||||
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);
|
||||
// wait for PLL to start using xtal as its input
|
||||
while (!(MCG_S & MCG_S_PLLST)) ;
|
||||
// wait for PLL to lock
|
||||
while (!(MCG_S & MCG_S_LOCK0)) ;
|
||||
// now we're in PBE mode
|
||||
#if F_CPU == 96000000
|
||||
// config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash
|
||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
// config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash
|
||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
#elif F_CPU == 48000000
|
||||
// config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash
|
||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
// config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash
|
||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
#elif F_CPU == 24000000
|
||||
// config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash
|
||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
// config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash
|
||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3);
|
||||
#else
|
||||
#error "Error, F_CPU must be 96000000, 48000000, or 24000000"
|
||||
#endif
|
||||
// switch to PLL as clock source, FLL input = 16 MHz / 512
|
||||
MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
|
||||
// wait for PLL clock to be used
|
||||
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
|
||||
// now we're in PEE mode
|
||||
// configure USB for 48 MHz clock
|
||||
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); // USB = 96 MHz PLL / 2
|
||||
// USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
|
||||
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
|
||||
// switch to PLL as clock source, FLL input = 16 MHz / 512
|
||||
MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
|
||||
// wait for PLL clock to be used
|
||||
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
|
||||
// now we're in PEE mode
|
||||
// configure USB for 48 MHz clock
|
||||
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); // USB = 96 MHz PLL / 2
|
||||
// USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
|
||||
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
|
||||
|
||||
// initialize the SysTick counter
|
||||
SYST_RVR = (F_CPU / 1000) - 1;
|
||||
SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
|
||||
// initialize the SysTick counter
|
||||
SYST_RVR = (F_CPU / 1000) - 1;
|
||||
SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
|
||||
|
||||
//init_pins();
|
||||
__enable_irq();
|
||||
@ -273,8 +458,8 @@ void ResetHandler(void)
|
||||
}
|
||||
*/
|
||||
startup_late_hook();
|
||||
main();
|
||||
while (1) ;
|
||||
main();
|
||||
while (1) ;
|
||||
}
|
||||
|
||||
// TODO: is this needed for c++ and where does it come from?
|
||||
@ -284,45 +469,101 @@ void _init(void)
|
||||
}
|
||||
*/
|
||||
|
||||
char *__brkval = (char *)&_ebss;
|
||||
|
||||
void * _sbrk(int incr)
|
||||
{
|
||||
static char *heap_end = (char *)&_ebss;
|
||||
char *prev = heap_end;
|
||||
//static char *heap_end = (char *)&_ebss;
|
||||
//char *prev = heap_end;
|
||||
//heap_end += incr;
|
||||
|
||||
heap_end += incr;
|
||||
char *prev = __brkval;
|
||||
__brkval += incr;
|
||||
return prev;
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
int _read(int file, char *ptr, int len)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* moved to Print.cpp, to support Print::printf()
|
||||
__attribute__((weak))
|
||||
int _write(int file, char *ptr, int len)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
*/
|
||||
|
||||
__attribute__((weak))
|
||||
int _close(int fd)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
#include <sys/stat.h>
|
||||
|
||||
__attribute__((weak))
|
||||
int _fstat(int fd, struct stat *st)
|
||||
{
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
int _isatty(int fd)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
int _lseek(int fd, long long offset, int whence)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
void _exit(int status)
|
||||
{
|
||||
while (1);
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
void __cxa_pure_virtual()
|
||||
{
|
||||
while (1);
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
int __cxa_guard_acquire (int *g)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
void __cxa_guard_release(int *g)
|
||||
{
|
||||
}
|
||||
|
||||
int nvic_execution_priority(void)
|
||||
{
|
||||
int priority=256;
|
||||
uint32_t primask, faultmask, basepri, ipsr;
|
||||
|
||||
// full algorithm in ARM DDI0403D, page B1-639
|
||||
// this isn't quite complete, but hopefully good enough
|
||||
asm volatile("mrs %0, faultmask\n" : "=r" (faultmask)::);
|
||||
if (faultmask) return -1;
|
||||
asm volatile("mrs %0, primask\n" : "=r" (primask)::);
|
||||
if (primask) return 0;
|
||||
asm volatile("mrs %0, ipsr\n" : "=r" (ipsr)::);
|
||||
if (ipsr) {
|
||||
if (ipsr < 16) priority = 0; // could be non-zero
|
||||
else priority = NVIC_GET_PRIORITY(ipsr - 16);
|
||||
}
|
||||
asm volatile("mrs %0, basepri\n" : "=r" (basepri)::);
|
||||
if (basepri > 0 && basepri < priority) priority = basepri;
|
||||
return priority;
|
||||
}
|
||||
|
||||
|
||||
984
Lib/mk20dx128.h
984
Lib/mk20dx128.h
File diff suppressed because it is too large
Load Diff
@ -1,3 +1,33 @@
|
||||
/* Teensyduino Core Library
|
||||
* http://www.pjrc.com/teensy/
|
||||
* Copyright (c) 2013 PJRC.COM, LLC.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining
|
||||
* a copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* 1. The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* 2. If the Software is incorporated into a build system that allows
|
||||
* selection among a list of target devices, then similar target
|
||||
* devices manufactured by PJRC.COM must be included in the list of
|
||||
* target devices and selectable in the same manner.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
|
||||
@ -41,6 +71,11 @@ SECTIONS
|
||||
*(.usbdescriptortable*)
|
||||
} > RAM
|
||||
|
||||
.dmabuffers (NOLOAD) : {
|
||||
. = ALIGN(4);
|
||||
*(.dmabuffers*)
|
||||
} > RAM
|
||||
|
||||
.usbbuffers (NOLOAD) : {
|
||||
. = ALIGN(4);
|
||||
*(.usbbuffers*)
|
||||
@ -64,7 +99,8 @@ SECTIONS
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
_ebss = .;
|
||||
__bss_end = .;
|
||||
} > RAM
|
||||
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
Reference in New Issue
Block a user