More preparation for mk20dx256vlh7
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@ -1,5 +1,5 @@
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/* Copyright (c) 2011,2012 Simon Schubert <2@0x2c.org>.
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/* Copyright (c) 2011,2012 Simon Schubert <2@0x2c.org>.
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* Modifications by Jacob Alexander 2014 <haata@kiibohd.com>
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* Modifications by Jacob Alexander 2014-2015 <haata@kiibohd.com>
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*
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*
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* This program is free software: you can redistribute it and/or modify
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -15,8 +15,9 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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// ----- Local Includes -----
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// ----- Includes -----
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// Local Includes
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#include "mchck.h"
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#include "mchck.h"
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#include "dfu.desc.h"
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#include "dfu.desc.h"
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@ -79,12 +80,24 @@ void init_usb_bootloader( int config )
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void main()
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void main()
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{
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{
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#if defined(_mk20dx128vlf5_) // Kiibohd-dfu / Infinity
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// XXX McHCK uses B16 instead of A19
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// Enabling LED to indicate we are in the bootloader
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// Enabling LED to indicate we are in the bootloader
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GPIOA_PDDR |= (1<<19);
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GPIOA_PDDR |= (1<<19);
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// Setup pin - A19 - See Lib/pin_map.mchck for more details on pins
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// Setup pin - A19 - See Lib/pin_map.mchck for more details on pins
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PORTA_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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PORTA_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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GPIOA_PSOR |= (1<<19);
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GPIOA_PSOR |= (1<<19);
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#elif defined(_mk20dx256vlh7_) // Kiibohd-dfu
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// Enabling LED to indicate we are in the bootloader
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GPIOA_PDDR |= (1<<5);
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// Setup pin - A5 - See Lib/pin_map.mchck for more details on pins
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PORTA_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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GPIOA_PSOR |= (1<<5);
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#endif
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flash_prepare_flashing();
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flash_prepare_flashing();
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usb_init( &dfu_device );
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usb_init( &dfu_device );
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@ -22,8 +22,9 @@ set( CHIP
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# "at90usb646" # Teensy++ 1.0 (avr)
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# "at90usb646" # Teensy++ 1.0 (avr)
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# "at90usb1286" # Teensy++ 2.0 (avr)
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# "at90usb1286" # Teensy++ 2.0 (avr)
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# "mk20dx128" # Teensy 3.0 (arm)
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# "mk20dx128" # Teensy 3.0 (arm)
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"mk20dx128vlf5" # McHCK mk20dx128vlf5
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"mk20dx128vlf5" # McHCK mk20dx128vlf5
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# "mk20dx256" # Teensy 3.1 (arm)
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# "mk20dx256" # Teensy 3.1 (arm)
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# "mk20dx256vlh7" # Kiibohd-dfu mk20dx256vlh7
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CACHE STRING "Microcontroller Chip" )
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CACHE STRING "Microcontroller Chip" )
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@ -50,7 +50,7 @@ inline void init_errorLED()
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// Setup pin - Pin 13 -> C5 - See Lib/pin_map.teensy3 for more details on pins
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// Setup pin - Pin 13 -> C5 - See Lib/pin_map.teensy3 for more details on pins
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PORTC_PCR5 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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PORTC_PCR5 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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// MCHCK
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// MCHCK / Kiibohd-dfu
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#elif defined(_mk20dx128vlf5_)
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#elif defined(_mk20dx128vlf5_)
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/* Actual MCHCK
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/* Actual MCHCK
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@ -67,6 +67,14 @@ inline void init_errorLED()
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// Setup pin - A19 - See Lib/pin_map.mchck for more details on pins
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// Setup pin - A19 - See Lib/pin_map.mchck for more details on pins
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PORTA_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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PORTA_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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// Kiibohd-dfu
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#elif defined(_mk20dx256vlh7_)
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// Kiibohd-dfu
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// Enable pin
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GPIOA_PDDR |= (1<<5);
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// Setup pin - A5 - See Lib/pin_map.mchck for more details on pins
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PORTA_PCR5 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
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#endif
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#endif
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}
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}
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@ -120,6 +128,18 @@ inline void errorLED( uint8_t on )
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GPIOA_PCOR |= (1<<19);
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GPIOA_PCOR |= (1<<19);
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}
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}
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// Kiibohd-dfu
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#elif defined(_mk20dx256vlh7_)
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// Kiibohd-dfu
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// Error LED On (A5)
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if ( on ) {
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GPIOA_PSOR |= (1<<5);
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}
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// Error LED Off
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else {
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GPIOA_PCOR |= (1<<5);
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}
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#endif
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#endif
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}
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}
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@ -1,39 +1,39 @@
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// Pin Name Function Hardware
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// Pin Name Function Hardware
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// ----------------------------------
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// ----------------------------------
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// 0 B16 RX1
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// 0 PTB16 RX0
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// 1 B17 TX1
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// 1 PTB17 TX0
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// 2 D0 PCS0
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// 2 PTD0 PCS0
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// 3 A12 FTM1_CH0 PWM (CAN TX - Teensy 3.1) I2S_TXD0
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// 3 PTA12 FTM1_CH0 PWM (CAN TX - Teensy 3.1) I2S_TXD0
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// 4 A13 FTM1_CH1 PWM (CAN RX - Teensy 3.1) I2S_TX_FS
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// 4 PTA13 FTM1_CH1 PWM (CAN RX - Teensy 3.1) I2S_TX_FS
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// 5 D7 FTM0_CH7 PWM
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// 5 PTD7 FTM0_CH7 PWM
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// 6 D4 FTM0_CH4 PWM PCS1
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// 6 PTD4 FTM0_CH4 PWM PCS1
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// 7 D2 RX3 SOUT0
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// 7 PTD2 RX2 SOUT0
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// 8 D3 TX3 SIN0
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// 8 PTD3 TX2 SIN0
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// 9 C3 FTM0_CH2 RX2 PWM PCS1 I2S_TX_BCLK
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// 9 PTC3 FTM0_CH2 RX1 PWM PCS1 I2S_TX_BCLK
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// 10 C4 FTM0_CH3 TX2 PWM PCS0
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// 10 PTC4 FTM0_CH3 TX1 PWM PCS0
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// 11 C6 SOUT0 I2S_RX_BCLK I2S_MCLK
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// 11 PTC6 SOUT0 I2S_RX_BCLK I2S_MCLK
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// 12 C7 SIN0 I2S_RX_FS
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// 12 PTC7 SIN0 I2S_RX_FS
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// 13 C5 LED SCK0 I2S_RXD0
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// 13 PTC5 LED SCK0 I2S_RXD0
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// 14 D1 SCK0
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// 14 PTD1 SCK0
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// 15 C0
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// 15 PTC0 PCS4 I2S_TXD1
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// 16 B0 (FTM1_CH0) SCL0
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// 16 PTB0 (FTM1_CH0) SCL0
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// 17 B1 (FTM1_CH1) SDA0
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// 17 PTB1 (FTM1_CH1) SDA0
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// 18 B3 SDA0
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// 18 PTB3 SDA0
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// 19 B2 SCL0
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// 19 PTB2 SCL0
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// 20 D5 FTM0_CH5 PWM PCS2
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// 20 PTD5 FTM0_CH5 PWM PCS2
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// 21 D6 FTM0_CH6 PWM PCS3
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// 21 PTD6 FTM0_CH6 PWM PCS3
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// 22 C1 FTM0_CH0 PWM PCS3 I2S_TXD0
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// 22 PTC1 FTM0_CH0 PWM PCS3 I2S_TXD0
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// 23 C2 FTM0_CH1 PWM PCS2 I2S_TX_FS
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// 23 PTC2 FTM0_CH1 PWM PCS2 I2S_TX_FS
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// 24 A5 (FTM0_CH2) I2S_TX_BCLK
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// 24 PTA5 (FTM0_CH2) I2S_TX_BCLK
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// 25 B19 (PWM - Teensy 3.1) I2S_TX_FS
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// 25 PTB19 (PWM - Teensy 3.1) I2S_TX_FS
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// 26 E1
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// 26 PTE1 RX1 SCL1
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// 27 C9 I2S_RX_BCLK
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// 27 PTC9 I2S_RX_BCLK
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// 28 C8 I2S_MCLK
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// 28 PTC8 I2S_MCLK
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// 29 C10 (SCL1 - Teensy 3.1) I2S_RX_FS
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// 29 PTC10 (SCL1 - Teensy 3.1) I2S_RX_FS
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// 30 C11 (SDA1 - Teensy 3.1) I2S_RXD1
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// 30 PTC11 (SDA1 - Teensy 3.1) I2S_RXD1
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// 31 E0
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// 31 PTE0 TX1 SDA1
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// 32 B18 (PWM - Teensy 3.1) I2S_TX_BCLK
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// 32 PTB18 (PWM - Teensy 3.1) I2S_TX_BCLK
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// 33 A4 (FTM0_CH1)
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// 33 PTA4 (FTM0_CH1)
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// 34 analog only
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// 34 analog only
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// 35 analog only
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// 35 analog only
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// 36 analog only
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// 36 analog only
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@ -43,13 +43,10 @@
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// 40 DAC/A14
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// 40 DAC/A14
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// not available to user:
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// not available to user:
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// A0 FTM0_CH5 SWD Clock
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// A0 FTM0_CH5 SWD Clock
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// A1 FTM0_CH6 USB ID
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// A1 FTM0_CH6 USB ID
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// A2 FTM0_CH7 SWD Trace
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// A2 FTM0_CH7 SWD Trace
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// A3 FTM0_CH0 SWD Data
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// A3 FTM0_CH0 SWD Data
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// misc
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C0 PCS4 I2S_TXD1
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// Analog Channel Channel
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// Analog Channel Channel
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// Pin Pin Name ADC0 ADC1
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// Pin Pin Name ADC0 ADC1
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@ -19,18 +19,74 @@
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* THE SOFTWARE.
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* THE SOFTWARE.
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*/
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*/
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#include "uart_serial.h"
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// ----- Includes -----
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// Compiler Includes
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#include <string.h> // For memcpy
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// Project Includes
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#include <Lib/OutputLib.h>
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#include <Lib/OutputLib.h>
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#include <Lib/Interrupts.h>
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#include <Lib/Interrupts.h>
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#include <string.h> // For memcpy
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// Local Includes
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#include "uart_serial.h"
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// ----- Defines -----
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// UART Configuration
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#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
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#define UART_BDH UART0_BDH
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#define UART_BDL UART0_BDL
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#define UART_C1 UART0_C1
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#define UART_C2 UART0_C2
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#define UART_C3 UART0_C3
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#define UART_C4 UART0_C4
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#define UART_CFIFO UART0_CFIFO
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#define UART_D UART0_D
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#define UART_PFIFO UART0_PFIFO
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#define UART_RCFIFO UART0_RCFIFO
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#define UART_RWFIFO UART0_RWFIFO
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#define UART_S1 UART0_S1
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#define UART_S2 UART0_S2
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#define UART_SFIFO UART0_SFIFO
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#define UART_TWFIFO UART0_TWFIFO
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#define SIM_SCGC4_UART SIM_SCGC4_UART0
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#define IRQ_UART_STATUS IRQ_UART0_STATUS
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#elif defined(_mk20dx256vlh7_) // UART2 Debug
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#define UART_BDH UART2_BDH
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#define UART_BDL UART2_BDL
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#define UART_C1 UART2_C1
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#define UART_C2 UART2_C2
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#define UART_C3 UART2_C3
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#define UART_C4 UART2_C4
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#define UART_CFIFO UART2_CFIFO
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#define UART_D UART2_D
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#define UART_PFIFO UART2_PFIFO
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#define UART_RCFIFO UART2_RCFIFO
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#define UART_RWFIFO UART2_RWFIFO
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#define UART_S1 UART2_S1
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#define UART_S2 UART2_S2
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#define UART_SFIFO UART2_SFIFO
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#define UART_TWFIFO UART2_TWFIFO
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#define SIM_SCGC4_UART SIM_SCGC4_UART2
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#define IRQ_UART_STATUS IRQ_UART2_STATUS
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#endif
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// ----- Variables -----
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// ----- Variables -----
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#define uart0_buffer_size 128 // 128 byte buffer
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#define uart_buffer_size 128 // 128 byte buffer
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volatile uint8_t uart0_buffer_head = 0;
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volatile uint8_t uart_buffer_head = 0;
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volatile uint8_t uart0_buffer_tail = 0;
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volatile uint8_t uart_buffer_tail = 0;
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volatile uint8_t uart0_buffer_items = 0;
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volatile uint8_t uart_buffer_items = 0;
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volatile uint8_t uart0_buffer[uart0_buffer_size];
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volatile uint8_t uart_buffer[uart_buffer_size];
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volatile uint8_t uart_configured = 0;
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volatile uint8_t uart_configured = 0;
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// ----- Interrupt Functions -----
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// ----- Interrupt Functions -----
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#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
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void uart0_status_isr()
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void uart0_status_isr()
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#elif defined(_mk20dx256vlh7_) // UART2 Debug
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void uart2_status_isr()
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#endif
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{
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{
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cli(); // Disable Interrupts
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cli(); // Disable Interrupts
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// UART0_S1 must be read for the interrupt to be cleared
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// UART0_S1 must be read for the interrupt to be cleared
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if ( UART0_S1 & ( UART_S1_RDRF | UART_S1_IDLE ) )
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if ( UART_S1 & ( UART_S1_RDRF | UART_S1_IDLE ) )
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{
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{
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uint8_t available = UART0_RCFIFO;
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uint8_t available = UART_RCFIFO;
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// If there was actually nothing
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// If there was actually nothing
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if ( available == 0 )
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if ( available == 0 )
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{
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{
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// Cleanup
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// Cleanup
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available = UART0_D;
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available = UART_D;
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UART0_CFIFO = UART_CFIFO_RXFLUSH;
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UART_CFIFO = UART_CFIFO_RXFLUSH;
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sei();
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sei();
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return;
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return;
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}
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}
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@ -60,25 +120,25 @@ void uart0_status_isr()
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// Read UART0 into buffer until FIFO is empty
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// Read UART0 into buffer until FIFO is empty
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while ( available-- > 0 )
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while ( available-- > 0 )
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{
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{
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uart0_buffer[uart0_buffer_tail++] = UART0_D;
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uart_buffer[uart_buffer_tail++] = UART_D;
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uart0_buffer_items++;
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uart_buffer_items++;
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// Wrap-around of tail pointer
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// Wrap-around of tail pointer
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if ( uart0_buffer_tail >= uart0_buffer_size )
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if ( uart_buffer_tail >= uart_buffer_size )
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{
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{
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uart0_buffer_tail = 0;
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uart_buffer_tail = 0;
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}
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}
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// Make sure the head pointer also moves if circular buffer is overwritten
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// Make sure the head pointer also moves if circular buffer is overwritten
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if ( uart0_buffer_head == uart0_buffer_tail )
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if ( uart_buffer_head == uart_buffer_tail )
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{
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{
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uart0_buffer_head++;
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uart_buffer_head++;
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}
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}
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// Wrap-around of head pointer
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// Wrap-around of head pointer
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if ( uart0_buffer_head >= uart0_buffer_size )
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if ( uart_buffer_head >= uart_buffer_size )
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{
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{
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uart0_buffer_head = 0;
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uart_buffer_head = 0;
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}
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}
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}
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}
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}
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}
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@ -96,14 +156,20 @@ void uart_serial_setup()
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uart_configured = 0;
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uart_configured = 0;
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// Setup the the UART interface for keyboard data input
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// Setup the the UART interface for keyboard data input
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SIM_SCGC4 |= SIM_SCGC4_UART0; // Disable clock gating
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SIM_SCGC4 |= SIM_SCGC4_UART; // Disable clock gating
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// MCHCK
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// MCHCK / Kiibohd-dfu
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#if defined(_mk20dx128vlf5_)
|
#if defined(_mk20dx128vlf5_)
|
||||||
// Pin Setup for UART0
|
// Pin Setup for UART0
|
||||||
PORTA_PCR1 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); // RX Pin
|
PORTA_PCR1 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); // RX Pin
|
||||||
PORTA_PCR2 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); // TX Pin
|
PORTA_PCR2 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); // TX Pin
|
||||||
|
|
||||||
|
// Kiibohd-dfu
|
||||||
|
#elif defined(_mk20dx256vlh7_)
|
||||||
|
// Pin Setup for UART2
|
||||||
|
PORTD_PCR2 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); // RX Pin
|
||||||
|
PORTD_PCR3 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
|
||||||
|
|
||||||
// Teensy
|
// Teensy
|
||||||
#else
|
#else
|
||||||
// Pin Setup for UART0
|
// Pin Setup for UART0
|
||||||
@ -111,44 +177,66 @@ void uart_serial_setup()
|
|||||||
PORTB_PCR17 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
|
PORTB_PCR17 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
|
||||||
// Setup baud rate - 115200 Baud
|
// Setup baud rate - 115200 Baud
|
||||||
// 48 MHz / ( 16 * Baud ) = BDH/L
|
// 48 MHz / ( 16 * Baud ) = BDH/L
|
||||||
// Baud: 115200 -> 48 MHz / ( 16 * 115200 ) = 26.0416667
|
// Baud: 115200 -> 48 MHz / ( 16 * 115200 ) = 26.0416667
|
||||||
// Thus baud setting = 26
|
// Thus baud setting = 26
|
||||||
// NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
|
// NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
|
||||||
uint16_t baud = 26; // Max setting of 8191
|
uint16_t baud = 26; // Max setting of 8191
|
||||||
UART0_BDH = (uint8_t)(baud >> 8);
|
UART_BDH = (uint8_t)(baud >> 8);
|
||||||
UART0_BDL = (uint8_t)baud;
|
UART_BDL = (uint8_t)baud;
|
||||||
UART0_C4 = 0x02;
|
UART_C4 = 0x02;
|
||||||
|
|
||||||
|
#elif defined(_mk20dx256vlh7_) // UART2 Debug
|
||||||
|
// Setup baud rate - 115200 Baud
|
||||||
|
// Uses Bus Clock
|
||||||
|
// 24 MHz / ( 16 * Baud ) = BDH/L
|
||||||
|
// Baud: 115200 -> 24 MHz / ( 16 * 115200 ) = 13.021
|
||||||
|
// Thus baud setting = 13
|
||||||
|
// NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
|
||||||
|
uint16_t baud = 13; // Max setting of 8191
|
||||||
|
UART_BDH = (uint8_t)(baud >> 8);
|
||||||
|
UART_BDL = (uint8_t)baud;
|
||||||
|
UART_C4 = 0x01;
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
// 8 bit, No Parity, Idle Character bit after stop
|
// 8 bit, No Parity, Idle Character bit after stop
|
||||||
UART0_C1 = UART_C1_ILT;
|
UART_C1 = UART_C1_ILT;
|
||||||
|
|
||||||
// Interrupt notification watermarks
|
// Interrupt notification watermarks
|
||||||
UART0_TWFIFO = 2;
|
#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
|
||||||
UART0_RWFIFO = 4;
|
UART_TWFIFO = 2;
|
||||||
|
UART_RWFIFO = 4;
|
||||||
|
#elif defined(_mk20dx256vlh7_) // UART2 Debug
|
||||||
|
// UART2 has a single byte FIFO
|
||||||
|
UART_TWFIFO = 1;
|
||||||
|
UART_RWFIFO = 1;
|
||||||
|
#endif
|
||||||
|
|
||||||
// TX FIFO Disabled, TX FIFO Size 1 (Max 8 datawords), RX FIFO Enabled, RX FIFO Size 1 (Max 8 datawords)
|
// TX FIFO Enabled, TX FIFO Size 1 (Max 8 datawords), RX FIFO Enabled, RX FIFO Size 1 (Max 8 datawords)
|
||||||
// TX/RX FIFO Size:
|
// TX/RX FIFO Size:
|
||||||
// 0x0 - 1 dataword
|
// 0x0 - 1 dataword
|
||||||
// 0x1 - 4 dataword
|
// 0x1 - 4 dataword
|
||||||
// 0x2 - 8 dataword
|
// 0x2 - 8 dataword
|
||||||
UART0_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
|
UART_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
|
||||||
|
|
||||||
// Reciever Inversion Disabled, LSBF
|
// Reciever Inversion Disabled, LSBF
|
||||||
// UART_S2_RXINV UART_S2_MSBF
|
// UART_S2_RXINV UART_S2_MSBF
|
||||||
UART0_S2 |= 0x00;
|
UART_S2 |= 0x00;
|
||||||
|
|
||||||
// Transmit Inversion Disabled
|
// Transmit Inversion Disabled
|
||||||
// UART_C3_TXINV
|
// UART_C3_TXINV
|
||||||
UART0_C3 |= 0x00;
|
UART_C3 |= 0x00;
|
||||||
|
|
||||||
// TX Enabled, RX Enabled, RX Interrupt Enabled, Generate idles
|
// TX Enabled, RX Enabled, RX Interrupt Enabled, Generate idles
|
||||||
// UART_C2_TE UART_C2_RE UART_C2_RIE UART_C2_ILIE
|
// UART_C2_TE UART_C2_RE UART_C2_RIE UART_C2_ILIE
|
||||||
UART0_C2 = UART_C2_TE | UART_C2_RE | UART_C2_RIE | UART_C2_ILIE;
|
UART_C2 = UART_C2_TE | UART_C2_RE | UART_C2_RIE | UART_C2_ILIE;
|
||||||
|
|
||||||
// Add interrupt to the vector table
|
// Add interrupt to the vector table
|
||||||
NVIC_ENABLE_IRQ( IRQ_UART0_STATUS );
|
NVIC_ENABLE_IRQ( IRQ_UART_STATUS );
|
||||||
|
|
||||||
// UART is now ready to use
|
// UART is now ready to use
|
||||||
uart_configured = 1;
|
uart_configured = 1;
|
||||||
@ -164,15 +252,15 @@ int uart_serial_getchar()
|
|||||||
unsigned int value = -1;
|
unsigned int value = -1;
|
||||||
|
|
||||||
// Check to see if the FIFO has characters
|
// Check to see if the FIFO has characters
|
||||||
if ( uart0_buffer_items > 0 )
|
if ( uart_buffer_items > 0 )
|
||||||
{
|
{
|
||||||
value = uart0_buffer[uart0_buffer_head++];
|
value = uart_buffer[uart_buffer_head++];
|
||||||
uart0_buffer_items--;
|
uart_buffer_items--;
|
||||||
|
|
||||||
// Wrap-around of head pointer
|
// Wrap-around of head pointer
|
||||||
if ( uart0_buffer_head >= uart0_buffer_size )
|
if ( uart_buffer_head >= uart_buffer_size )
|
||||||
{
|
{
|
||||||
uart0_buffer_head = 0;
|
uart_buffer_head = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -183,16 +271,16 @@ int uart_serial_getchar()
|
|||||||
// Number of bytes available in the receive buffer
|
// Number of bytes available in the receive buffer
|
||||||
int uart_serial_available()
|
int uart_serial_available()
|
||||||
{
|
{
|
||||||
return uart0_buffer_items;
|
return uart_buffer_items;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// Discard any buffered input
|
// Discard any buffered input
|
||||||
void uart_serial_flush_input()
|
void uart_serial_flush_input()
|
||||||
{
|
{
|
||||||
uart0_buffer_head = 0;
|
uart_buffer_head = 0;
|
||||||
uart0_buffer_tail = 0;
|
uart_buffer_tail = 0;
|
||||||
uart0_buffer_items = 0;
|
uart_buffer_items = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -202,8 +290,8 @@ int uart_serial_putchar( uint8_t c )
|
|||||||
if ( !uart_configured )
|
if ( !uart_configured )
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
while ( !( UART0_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
|
while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
|
||||||
UART0_D = c;
|
UART_D = c;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -220,8 +308,8 @@ int uart_serial_write( const void *buffer, uint32_t size )
|
|||||||
// While buffer is not empty and transmit buffer is
|
// While buffer is not empty and transmit buffer is
|
||||||
while ( position < size )
|
while ( position < size )
|
||||||
{
|
{
|
||||||
while ( !( UART0_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
|
while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
|
||||||
UART0_D = data[position++];
|
UART_D = data[position++];
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@ -231,7 +319,7 @@ int uart_serial_write( const void *buffer, uint32_t size )
|
|||||||
void uart_serial_flush_output()
|
void uart_serial_flush_output()
|
||||||
{
|
{
|
||||||
// Delay until buffer has been sent
|
// Delay until buffer has been sent
|
||||||
while ( !( UART0_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
|
while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user