331 lines
8.2 KiB
C
331 lines
8.2 KiB
C
/* Copyright (C) 2014-2015 by Jacob Alexander
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// ----- Includes -----
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// Compiler Includes
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#include <string.h> // For memcpy
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// Project Includes
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#include <Lib/OutputLib.h>
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#include <Lib/Interrupts.h>
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// Local Includes
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#include "uart_serial.h"
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// ----- Defines -----
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// UART Configuration
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#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
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#define UART_BDH UART0_BDH
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#define UART_BDL UART0_BDL
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#define UART_C1 UART0_C1
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#define UART_C2 UART0_C2
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#define UART_C3 UART0_C3
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#define UART_C4 UART0_C4
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#define UART_CFIFO UART0_CFIFO
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#define UART_D UART0_D
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#define UART_PFIFO UART0_PFIFO
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#define UART_RCFIFO UART0_RCFIFO
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#define UART_RWFIFO UART0_RWFIFO
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#define UART_S1 UART0_S1
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#define UART_S2 UART0_S2
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#define UART_SFIFO UART0_SFIFO
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#define UART_TWFIFO UART0_TWFIFO
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#define SIM_SCGC4_UART SIM_SCGC4_UART0
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#define IRQ_UART_STATUS IRQ_UART0_STATUS
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#elif defined(_mk20dx256vlh7_) // UART2 Debug
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#define UART_BDH UART2_BDH
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#define UART_BDL UART2_BDL
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#define UART_C1 UART2_C1
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#define UART_C2 UART2_C2
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#define UART_C3 UART2_C3
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#define UART_C4 UART2_C4
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#define UART_CFIFO UART2_CFIFO
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#define UART_D UART2_D
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#define UART_PFIFO UART2_PFIFO
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#define UART_RCFIFO UART2_RCFIFO
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#define UART_RWFIFO UART2_RWFIFO
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#define UART_S1 UART2_S1
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#define UART_S2 UART2_S2
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#define UART_SFIFO UART2_SFIFO
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#define UART_TWFIFO UART2_TWFIFO
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#define SIM_SCGC4_UART SIM_SCGC4_UART2
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#define IRQ_UART_STATUS IRQ_UART2_STATUS
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#endif
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// ----- Variables -----
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#define uart_buffer_size 128 // 128 byte buffer
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volatile uint8_t uart_buffer_head = 0;
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volatile uint8_t uart_buffer_tail = 0;
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volatile uint8_t uart_buffer_items = 0;
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volatile uint8_t uart_buffer[uart_buffer_size];
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volatile uint8_t uart_configured = 0;
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// ----- Interrupt Functions -----
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#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
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void uart0_status_isr()
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#elif defined(_mk20dx256vlh7_) // UART2 Debug
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void uart2_status_isr()
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#endif
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{
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cli(); // Disable Interrupts
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// UART0_S1 must be read for the interrupt to be cleared
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if ( UART_S1 & ( UART_S1_RDRF | UART_S1_IDLE ) )
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{
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uint8_t available = UART_RCFIFO;
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// If there was actually nothing
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if ( available == 0 )
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{
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// Cleanup
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available = UART_D;
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UART_CFIFO = UART_CFIFO_RXFLUSH;
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sei();
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return;
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}
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// Read UART0 into buffer until FIFO is empty
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while ( available-- > 0 )
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{
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uart_buffer[uart_buffer_tail++] = UART_D;
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uart_buffer_items++;
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// Wrap-around of tail pointer
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if ( uart_buffer_tail >= uart_buffer_size )
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{
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uart_buffer_tail = 0;
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}
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// Make sure the head pointer also moves if circular buffer is overwritten
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if ( uart_buffer_head == uart_buffer_tail )
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{
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uart_buffer_head++;
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}
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// Wrap-around of head pointer
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if ( uart_buffer_head >= uart_buffer_size )
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{
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uart_buffer_head = 0;
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}
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}
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}
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sei(); // Re-enable Interrupts
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}
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// ----- Functions -----
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void uart_serial_setup()
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{
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// Indication that the UART is not ready yet
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uart_configured = 0;
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// Setup the the UART interface for keyboard data input
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SIM_SCGC4 |= SIM_SCGC4_UART; // Disable clock gating
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// MCHCK / Kiibohd-dfu
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#if defined(_mk20dx128vlf5_)
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// Pin Setup for UART0
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PORTA_PCR1 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); // RX Pin
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PORTA_PCR2 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); // TX Pin
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// Kiibohd-dfu
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#elif defined(_mk20dx256vlh7_)
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// Pin Setup for UART2
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PORTD_PCR2 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); // RX Pin
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PORTD_PCR3 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
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// Teensy
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#else
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// Pin Setup for UART0
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PORTB_PCR16 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); // RX Pin
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PORTB_PCR17 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
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#endif
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#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
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// Setup baud rate - 115200 Baud
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// 48 MHz / ( 16 * Baud ) = BDH/L
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// Baud: 115200 -> 48 MHz / ( 16 * 115200 ) = 26.0416667
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// Thus baud setting = 26
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// NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
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uint16_t baud = 26; // Max setting of 8191
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UART_BDH = (uint8_t)(baud >> 8);
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UART_BDL = (uint8_t)baud;
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UART_C4 = 0x02;
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#elif defined(_mk20dx256vlh7_) // UART2 Debug
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// Setup baud rate - 115200 Baud
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// Uses Bus Clock
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// 24 MHz / ( 16 * Baud ) = BDH/L
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// Baud: 115200 -> 24 MHz / ( 16 * 115200 ) = 13.021
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// Thus baud setting = 13
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// NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
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uint16_t baud = 13; // Max setting of 8191
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UART_BDH = (uint8_t)(baud >> 8);
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UART_BDL = (uint8_t)baud;
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UART_C4 = 0x01;
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#endif
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// 8 bit, No Parity, Idle Character bit after stop
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UART_C1 = UART_C1_ILT;
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// Interrupt notification watermarks
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#if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
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UART_TWFIFO = 2;
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UART_RWFIFO = 4;
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#elif defined(_mk20dx256vlh7_) // UART2 Debug
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// UART2 has a single byte FIFO
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UART_TWFIFO = 1;
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UART_RWFIFO = 1;
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#endif
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// TX FIFO Enabled, TX FIFO Size 1 (Max 8 datawords), RX FIFO Enabled, RX FIFO Size 1 (Max 8 datawords)
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// TX/RX FIFO Size:
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// 0x0 - 1 dataword
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// 0x1 - 4 dataword
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// 0x2 - 8 dataword
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UART_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
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// Reciever Inversion Disabled, LSBF
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// UART_S2_RXINV UART_S2_MSBF
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UART_S2 |= 0x00;
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// Transmit Inversion Disabled
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// UART_C3_TXINV
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UART_C3 |= 0x00;
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// TX Enabled, RX Enabled, RX Interrupt Enabled, Generate idles
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// UART_C2_TE UART_C2_RE UART_C2_RIE UART_C2_ILIE
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UART_C2 = UART_C2_TE | UART_C2_RE | UART_C2_RIE | UART_C2_ILIE;
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// Add interrupt to the vector table
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NVIC_ENABLE_IRQ( IRQ_UART_STATUS );
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// UART is now ready to use
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uart_configured = 1;
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}
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// Get the next character, or -1 if nothing received
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int uart_serial_getchar()
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{
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if ( !uart_configured )
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return -1;
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unsigned int value = -1;
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// Check to see if the FIFO has characters
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if ( uart_buffer_items > 0 )
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{
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value = uart_buffer[uart_buffer_head++];
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uart_buffer_items--;
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// Wrap-around of head pointer
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if ( uart_buffer_head >= uart_buffer_size )
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{
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uart_buffer_head = 0;
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}
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}
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return value;
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}
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// Number of bytes available in the receive buffer
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int uart_serial_available()
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{
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return uart_buffer_items;
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}
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// Discard any buffered input
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void uart_serial_flush_input()
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{
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uart_buffer_head = 0;
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uart_buffer_tail = 0;
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uart_buffer_items = 0;
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}
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// Transmit a character. 0 returned on success, -1 on error
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int uart_serial_putchar( uint8_t c )
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{
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if ( !uart_configured )
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return -1;
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while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
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UART_D = c;
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return 0;
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}
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int uart_serial_write( const void *buffer, uint32_t size )
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{
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if ( !uart_configured )
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return -1;
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const uint8_t *data = (const uint8_t *)buffer;
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uint32_t position = 0;
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// While buffer is not empty and transmit buffer is
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while ( position < size )
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{
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while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
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UART_D = data[position++];
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}
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return 0;
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}
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void uart_serial_flush_output()
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{
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// Delay until buffer has been sent
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while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
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}
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void uart_device_reload()
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{
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asm volatile("bkpt");
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}
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