Keyboard firmwares for Atmel AVR and Cortex-M
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README.md 5.6KB

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  1. KL27Z128/256 board
  2. ==================
  3. 2016/11/30
  4. KL27Z is configured to use internal 48MHz RC oscillator.
  5. The board has push button on PTA4 and LED on PTD7. The button works as 'a' key and the LED as an indicator for capslock.
  6. ELF board
  7. ---------
  8. This board acommodates 48QFN chip.
  9. ### prototypte pinout
  10. - pcb layout https://deskthority.net/resources/image/33293
  11. - schematic https://deskthority.net/resources/image/33252
  12. ```
  13. G G
  14. N 5 D D N F D D D D D D
  15. D V - + D G \ USB / 6 5 4 3 2 1
  16. ,--------------------- | Conn | --------------------.
  17. |39 40 41 42 43 44 | | 1 2 3 4 5 6 |
  18. 3.3V|38 |_________| 7 |D0
  19. A0|37 RST 8 |C7
  20. A3|36 9 |C6
  21. +A20|35 10|C5+
  22. E20|34 11|C4
  23. E21|33 BL 12|C3
  24. E29|32 13|C2
  25. |31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14|
  26. `-------------------------------------------------------'
  27. E E E A A A 3 A G A C B B B B B C C
  28. 3 2 2 1 2 4 . 1 N 1 1 1 2 3 1 1 0 1
  29. 0 4 5 + + 3V 8 D 9 6 7
  30. 1 PTD6 12 PTC3 23 GND 34 PTE20*
  31. 2 PTD5 13 PTC2 24 PTA18 35 PTA20/Reset+
  32. 3 PTD4 14 PTC1 25 3.3V 36 PTA3/SWD_DIO
  33. 4 PTD3* 15 PTC0* 26 PTA4/NMI+ 37 PTA0/SWD_CLK
  34. 5 PTD2* 16 PTB17* 27 PTA2 38 3.3V
  35. 6 PTD1* 17 PTB16* 28 PTA1+ 39 GND
  36. 7 PTD0* 18 PTB3* 29 PTE25* 40 VBUS/VREGIN/5V
  37. 8 PTC7 19 PTB2* 30 PTE24* 41 USB D-
  38. 9 PTC6 20 PTB1 31 PTE30 42 USB D+
  39. 10 PTC5+ 21 PTB0 32 PTE29* 43 GND
  40. 11 PTC4 22 PTA19 33 PTE21* 44 USB Shield/FB
  41. +: Pins with resistor or switch
  42. *: Pins which don't exist in QFN32
  43. ```
  44. TMK KL27Z breakout
  45. ------------------
  46. This board acommodates 48QFN chip.
  47. ### Pinputs
  48. _\ conn /_
  49. 1 28
  50. : :
  51. : PROG :
  52. : RST :
  53. 14 15
  54. ----------
  55. 1 VUSB 28 GND
  56. 2 VIN/VREGIN 27 PTD4
  57. 3 PTD5 26 PTC7
  58. 4 PTD6 25 PTC6
  59. 5 PTD7 24 PTC5+
  60. 6 PTE0* 23 PTC4
  61. 7 3.3V 22 GND
  62. 8 PTE30 21 PTC3
  63. 9 PTA0/SWD_CLK 20 PTC2
  64. 10 PTA1+ 19 PTC1
  65. 11 PTA2 18 PTB1
  66. 12 PTA3/SWD_DIO 17 PTB0
  67. 13 PTA4/NMI+ 16 PTA20/Reset+
  68. 14 PTA18 15 PTA19
  69. *: Pin which doesn't exist in QFN48
  70. #### Pinouts difference between 32QFN and 48QFN
  71. 48QFN doesn't have PTE0
  72. 32QFN doesn't have PTD0-3, PTC0, PTE20-21,24,25,29, PTB2-3,16,17
  73. ### ROM bootloader pins
  74. See Reference Manual Chapter 13.
  75. PTA2 LPUART0_TX
  76. PTA1 LPUART0_RX *
  77. PTB0 I2C0_SCL
  78. PTB1 I2C0_SDA
  79. PTC4 SPI0_SS_b *
  80. PTC7 SPI0_MISO
  81. PTC6 SPI0_MOSI
  82. PTC5 SPI0_SCK *
  83. Due to errata e9457, need to pull-up `SPI0_SS_b`(or `SPI0_SCK`) to prevent false detection of SPI.
  84. The errata doesn't refer UART though, `LPUART0_RX` also requires pull-up or down resisitor from experience.
  85. Without resistor it easily false-detects activity on UART interface with finger touch on the pin.
  86. Resources
  87. ---------
  88. ### Deskthority thread
  89. https://deskthority.net/workshop-f7/can-we-design-the-teensy-alternative-for-keyboards-t13662-510.html
  90. ### Kinetis KL2x
  91. http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/l-series-ultra-low-power-m0-plus/kinetis-kl2x-48-mhz-usb-ultra-low-power-microcontrollers-based-on-arm-cortex-m0-plus:KL2x
  92. ### KL27Z128/256 Data Sheet
  93. http://www.nxp.com/assets/documents/data/en/data-sheets/KL27P64M48SF6.pdf
  94. ### KL27Z128/256 Reference Manual
  95. http://www.nxp.com/assets/documents/data/en/reference-manuals/KL27P64M48SF6RM.pdf
  96. ### Errata
  97. http://www.nxp.com/assets/documents/data/en/errata/KINETIS_L_1N71K.pdf
  98. >>
  99. e9457: Kinetis Flashloader/ ROM Bootloader: The peripheral auto-detect code in
  100. bootloader can falsely detect presence of SPI host causing non-responsive
  101. bootloader
  102. Description: During the active peripheral detection process, the bootloader can interpret spurious data on
  103. the SPI peripheral as valid data. The spurious data causes the bootloader to shutdown all
  104. peripherals except the “falsely detected" SPI and enter the command phase loop using the
  105. SPI. After the bootloader enters the command phase loop using the SPI, the other peripherals
  106. are ignored, so the desired peripheral is no longer active.
  107. The bootloader will not falsely detect activity on the I2C, UART, or USB interfaces, so only the
  108. SPI interface is affected.
  109. Workaround: Ensure that there is an external pull-up on the SPI chip-select pin or that the pin is driven high.
  110. This will prevent the bootloader from seeing spurious data due to activity on the SPI clock pin.
  111. ### Kinetis Bootloader and blhost
  112. http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/kinetis-symbols-footprints-and-models/kinetis-bootloader:KBOOT
  113. Build
  114. -----
  115. make
  116. Program
  117. -------
  118. Flash firmware with ROM bootloader.
  119. blhost -u -- flash-image build/kl27z.hex erase
  120. TODO
  121. ----
  122. - Fix boards/ELF files
  123. - add macro `USBx_CTL_RESUME` to ChibiOS-Contrib/os/common/ext/CMSIS/KINETIS/kl27zxxx.h