61 řádky
3.0 KiB
C
61 řádky
3.0 KiB
C
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/* Copyright (c) 2010-2011 mbed.org, MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
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* and associated documentation files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef OHCI_WRAPP_RZ_A1_H
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#define OHCI_WRAPP_RZ_A1_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define OHCI_REG_REVISION (0x00) /* HcRevision */
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#define OHCI_REG_CONTROL (0x04) /* HcControl */
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#define OHCI_REG_COMMANDSTATUS (0x08) /* HcCommandStatus */
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#define OHCI_REG_INTERRUPTSTATUS (0x0C) /* HcInterruptStatus */
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#define OHCI_REG_INTERRUPTENABLE (0x10) /* HcInterruptEnable */
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#define OHCI_REG_INTERRUPTDISABLE (0x14) /* HcInterruptDisable */
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#define OHCI_REG_HCCA (0x18) /* HcHCCA */
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#define OHCI_REG_PERIODCURRENTED (0x1C) /* HcPeriodCurrentED */
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#define OHCI_REG_CONTROLHEADED (0x20) /* HcControlHeadED */
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#define OHCI_REG_CONTROLCURRENTED (0x24) /* HcControlCurrentED */
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#define OHCI_REG_BULKHEADED (0x28) /* HcBulkHeadED */
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#define OHCI_REG_BULKCURRENTED (0x2C) /* HcBulkCurrentED */
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#define OHCI_REG_DONEHEADED (0x30) /* HcDoneHead */
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#define OHCI_REG_FMINTERVAL (0x34) /* HcFmInterval */
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#define OHCI_REG_FMREMAINING (0x38) /* HcFmRemaining */
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#define OHCI_REG_FMNUMBER (0x3C) /* HcFmNumber */
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#define OHCI_REG_PERIODICSTART (0x40) /* HcPeriodicStart */
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#define OHCI_REG_LSTHRESHOLD (0x44) /* HcLSThreshold */
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#define OHCI_REG_RHDESCRIPTORA (0x48) /* HcRhDescriptorA */
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#define OHCI_REG_RHDESCRIPTORB (0x4C) /* HcRhDescriptorB */
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#define OHCI_REG_RHSTATUS (0x50) /* HcRhStatus */
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#define OHCI_REG_RHPORTSTATUS1 (0x54) /* HcRhPortStatus1 */
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typedef void (usbisr_fnc_t)(void);
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extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc);
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extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs);
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extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data);
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extern void ohciwrapp_interrupt(uint32_t int_sense);
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#ifdef __cplusplus
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}
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#endif
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#endif /* OHCI_WRAPP_RZ_A1_H */
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