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/* File: startup_MK20D5.s |
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* Purpose: startup file for Cortex-M4 devices. Should use with |
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* GCC for ARM Embedded Processors |
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* Version: V1.3 |
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* Date: 08 Feb 2012 |
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* |
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* Copyright (c) 2012, ARM Limited |
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* All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* Redistributions of source code must retain the above copyright |
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notice, this list of conditions and the following disclaimer. |
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* Redistributions in binary form must reproduce the above copyright |
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notice, this list of conditions and the following disclaimer in the |
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documentation and/or other materials provided with the distribution. |
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* Neither the name of the ARM Limited nor the |
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names of its contributors may be used to endorse or promote products |
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derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY |
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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.syntax unified |
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.arch armv7-m |
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.section .stack |
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.align 3 |
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#ifdef __STACK_SIZE |
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.equ Stack_Size, __STACK_SIZE |
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#else |
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.equ Stack_Size, 0x400 |
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#endif |
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.globl __StackTop |
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.globl __StackLimit |
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__StackLimit: |
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.space Stack_Size |
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.size __StackLimit, . - __StackLimit |
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__StackTop: |
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.size __StackTop, . - __StackTop |
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.section .heap |
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.align 3 |
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#ifdef __HEAP_SIZE |
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.equ Heap_Size, __HEAP_SIZE |
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#else |
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.equ Heap_Size, 0xC00 |
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#endif |
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.globl __HeapBase |
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.globl __HeapLimit |
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__HeapBase: |
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.if Heap_Size |
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.space Heap_Size |
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.endif |
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.size __HeapBase, . - __HeapBase |
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__HeapLimit: |
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.size __HeapLimit, . - __HeapLimit |
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.section .isr_vector |
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.align 2 |
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.globl __isr_vector |
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__isr_vector: |
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.long __StackTop /* Top of Stack */ |
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.long Reset_Handler /* Reset Handler */ |
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.long NMI_Handler /* NMI Handler */ |
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.long HardFault_Handler /* Hard Fault Handler */ |
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.long MemManage_Handler /* MPU Fault Handler */ |
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.long BusFault_Handler /* Bus Fault Handler */ |
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.long UsageFault_Handler /* Usage Fault Handler */ |
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.long 0 /* Reserved */ |
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.long 0 /* Reserved */ |
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.long 0 /* Reserved */ |
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.long 0 /* Reserved */ |
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.long SVC_Handler /* SVCall Handler */ |
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.long DebugMon_Handler /* Debug Monitor Handler */ |
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.long 0 /* Reserved */ |
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.long PendSV_Handler /* PendSV Handler */ |
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.long SysTick_Handler /* SysTick Handler */ |
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/* External interrupts */ |
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.long DMA0_IRQHandler /* 0: Watchdog Timer */ |
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.long DMA1_IRQHandler /* 1: Real Time Clock */ |
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.long DMA2_IRQHandler /* 2: Timer0 / Timer1 */ |
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.long DMA3_IRQHandler /* 3: Timer2 / Timer3 */ |
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.long DMA_Error_IRQHandler /* 4: MCIa */ |
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.long 0 /* 5: MCIb */ |
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.long FTFL_IRQHandler /* 6: UART0 - DUT FPGA */ |
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.long Read_Collision_IRQHandler /* 7: UART1 - DUT FPGA */ |
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.long LVD_LVW_IRQHandler /* 8: UART2 - DUT FPGA */ |
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.long LLW_IRQHandler /* 9: UART4 - not connected */ |
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.long Watchdog_IRQHandler /* 10: AACI / AC97 */ |
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.long I2C0_IRQHandler /* 11: CLCD Combined Interrupt */ |
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.long SPI0_IRQHandler /* 12: Ethernet */ |
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.long I2S0_Tx_IRQHandler /* 13: USB Device */ |
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.long I2S0_Rx_IRQHandler /* 14: USB Host Controller */ |
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.long UART0_LON_IRQHandler /* 15: Character LCD */ |
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.long UART0_RX_TX_IRQHandler /* 16: Flexray */ |
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.long UART0_ERR_IRQHandler /* 17: CAN */ |
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.long UART1_RX_TX_IRQHandler /* 18: LIN */ |
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.long UART1_ERR_IRQHandler /* 19: I2C ADC/DAC */ |
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.long UART2_RX_TX_IRQHandler /* 20: Reserved */ |
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.long UART2_ERR_IRQHandler /* 21: Reserved */ |
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.long ADC0_IRQHandler /* 22: Reserved */ |
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.long CMP0_IRQHandler /* 23: Reserved */ |
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.long CMP1_IRQHandler /* 24: Reserved */ |
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.long FTM0_IRQHandler /* 25: Reserved */ |
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.long FTM1_IRQHandler /* 26: Reserved */ |
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.long CMT_IRQHandler /* 27: Reserved */ |
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.long RTC_IRQHandler /* 28: Reserved - CPU FPGA CLCD */ |
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.long RTC_Seconds_IRQHandler /* 29: Reserved - CPU FPGA */ |
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.long PIT0_IRQHandler /* 30: UART3 - CPU FPGA */ |
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.long PIT1_IRQHandler /* 31: SPI Touchscreen - CPU FPGA */ |
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.long PIT2_IRQHandler |
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.long PIT3_IRQHandler |
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.long PDB0_IRQHandler |
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.long USB0_IRQHandler |
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.long USBDCD_IRQHandler |
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.long TSI0_IRQHandler |
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.long MCG_IRQHandler |
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.long LPTimer_IRQHandler |
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.long PORTA_IRQHandler |
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.long PORTB_IRQHandler |
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.long PORTC_IRQHandler |
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.long PORTD_IRQHandler |
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.long PORTE_IRQHandler |
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.long SWI_IRQHandler |
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.size __isr_vector, . - __isr_vector |
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.section .text.Reset_Handler |
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.thumb |
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.thumb_func |
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.align 2 |
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.globl Reset_Handler |
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.type Reset_Handler, %function |
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Reset_Handler: |
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/* Loop to copy data from read only memory to RAM. The ranges |
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* of copy from/to are specified by following symbols evaluated in |
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* linker script. |
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* __etext: End of code section, i.e., begin of data sections to copy from. |
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* __data_start__/__data_end__: RAM address range that data should be |
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* copied to. Both must be aligned to 4 bytes boundary. */ |
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ldr r0, =SystemInit |
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blx r0 |
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ldr r1, =__etext |
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ldr r2, =__data_start__ |
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ldr r3, =__data_end__ |
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.Lflash_to_ram_loop: |
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cmp r2, r3 |
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ittt lt |
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ldrlt r0, [r1], #4 |
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strlt r0, [r2], #4 |
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blt .Lflash_to_ram_loop |
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.Lflash_to_ram_loop_end: |
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ldr r0, =_start |
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bx r0 |
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.pool |
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.size Reset_Handler, . - Reset_Handler |
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.text |
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/* Macro to define default handlers. Default handler |
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* will be weak symbol and just dead loops. They can be |
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* overwritten by other handlers */ |
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.macro def_default_handler handler_name |
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.align 1 |
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.thumb_func |
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.weak \handler_name |
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.type \handler_name, %function |
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\handler_name : |
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b . |
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.size \handler_name, . - \handler_name |
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.endm |
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def_default_handler NMI_Handler |
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def_default_handler HardFault_Handler |
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def_default_handler MemManage_Handler |
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def_default_handler BusFault_Handler |
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def_default_handler UsageFault_Handler |
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def_default_handler SVC_Handler |
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def_default_handler DebugMon_Handler |
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def_default_handler PendSV_Handler |
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def_default_handler SysTick_Handler |
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def_default_handler Default_Handler |
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.macro def_irq_default_handler handler_name |
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.weak \handler_name |
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.set \handler_name, Default_Handler |
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.endm |
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def_irq_default_handler DMA0_IRQHandler |
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def_irq_default_handler DMA1_IRQHandler |
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def_irq_default_handler DMA2_IRQHandler |
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def_irq_default_handler DMA3_IRQHandler |
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def_irq_default_handler DMA_Error_IRQHandler |
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def_irq_default_handler FTFL_IRQHandler |
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def_irq_default_handler Read_Collision_IRQHandler |
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def_irq_default_handler LVD_LVW_IRQHandler |
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def_irq_default_handler LLW_IRQHandler |
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def_irq_default_handler Watchdog_IRQHandler |
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def_irq_default_handler I2C0_IRQHandler |
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def_irq_default_handler SPI0_IRQHandler |
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def_irq_default_handler I2S0_Tx_IRQHandler |
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def_irq_default_handler I2S0_Rx_IRQHandler |
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def_irq_default_handler UART0_LON_IRQHandler |
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def_irq_default_handler UART0_RX_TX_IRQHandler |
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def_irq_default_handler UART0_ERR_IRQHandler |
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def_irq_default_handler UART1_RX_TX_IRQHandler |
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def_irq_default_handler UART1_ERR_IRQHandler |
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def_irq_default_handler UART2_RX_TX_IRQHandler |
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def_irq_default_handler UART2_ERR_IRQHandler |
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def_irq_default_handler ADC0_IRQHandler |
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def_irq_default_handler CMP0_IRQHandler |
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def_irq_default_handler CMP1_IRQHandler |
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def_irq_default_handler FTM0_IRQHandler |
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def_irq_default_handler FTM1_IRQHandler |
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def_irq_default_handler CMT_IRQHandler |
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def_irq_default_handler RTC_IRQHandler |
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def_irq_default_handler RTC_Seconds_IRQHandler |
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def_irq_default_handler PIT0_IRQHandler |
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def_irq_default_handler PIT1_IRQHandler |
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def_irq_default_handler PIT2_IRQHandler |
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def_irq_default_handler PIT3_IRQHandler |
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def_irq_default_handler PDB0_IRQHandler |
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def_irq_default_handler USB0_IRQHandler |
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def_irq_default_handler USBDCD_IRQHandler |
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def_irq_default_handler TSI0_IRQHandler |
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def_irq_default_handler MCG_IRQHandler |
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def_irq_default_handler LPTimer_IRQHandler |
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def_irq_default_handler PORTA_IRQHandler |
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def_irq_default_handler PORTB_IRQHandler |
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def_irq_default_handler PORTC_IRQHandler |
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def_irq_default_handler PORTD_IRQHandler |
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def_irq_default_handler PORTE_IRQHandler |
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def_irq_default_handler SWI_IRQHandler |
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def_irq_default_handler DEF_IRQHandler |
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/* Flash protection region, placed at 0x400 */ |
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.text |
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.thumb |
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.align 2 |
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.section .kinetis_flash_config_field,"a",%progbits |
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kinetis_flash_config: |
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.long 0xffffffff |
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.long 0xffffffff |
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.long 0xffffffff |
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.long 0xfffffffe |
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.end |
Jun Wako
9 years ago