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@@ -19,13 +19,15 @@ |
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// PB3, PB4, PB5, PB6(A, B, C, D) |
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// use D as ENABLE: (enable: 0/unenable: 1) |
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// key: KEY: (on: 0/ off:1) |
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// UNKNOWN: unknown whether input or output |
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// PE6,PE7(KEY, UNKNOWN) |
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// KEY_PREV: (on: 1/ off: 0) |
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// PE6,PE7(KEY, KEY_PREV) |
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#define COL_ENABLE (1<<6) |
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#define KEY_SELELCT(ROW, COL) (PORTB = COL_ENABLE|(((COL)&0x07)<<3)|((ROW)&0x07)) |
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#define KEY_ENABLE (PORTB &= ~COL_ENABLE) |
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#define KEY_UNABLE (PORTB |= COL_ENABLE) |
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#define KEY_ON ((PINE&(1<<6)) ? false : true) |
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#define KEY_STATE (PINE&(1<<6)) |
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#define KEY_PREV_ON (PORTE |= (1<<7)) |
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#define KEY_PREV_OFF (PORTE &= ~(1<<7)) |
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// matrix state buffer |
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static uint8_t *matrix; |
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@@ -52,9 +54,10 @@ void matrix_init(void) |
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// row & col output(PB0-6) |
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DDRB = 0xFF; |
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PORTB = KEY_SELELCT(0, 0); |
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// KEY & VALID input with pullup(PE6,7) |
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DDRE = 0x3F; |
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PORTE = 0xC0; |
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// KEY: input with pullup(PE6) |
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// KEY_PREV: output(PE7) |
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DDRE = 0xBF; |
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PORTE = 0x40; |
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// initialize matrix state: all keys off |
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for (int i=0; i < MATRIX_ROWS; i++) _matrix0[i] = 0x00; |
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@@ -74,14 +77,19 @@ int matrix_scan(void) |
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for (int row = 0; row < MATRIX_ROWS; row++) { |
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for (int col = 0; col < MATRIX_COLS; col++) { |
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KEY_SELELCT(row, col); |
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_delay_us(50); // from logic analyzer chart |
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_delay_us(40); // from logic analyzer chart |
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if (matrix_prev[row] & (1<<col)) { |
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KEY_PREV_ON; |
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} |
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_delay_us(7); // from logic analyzer chart |
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KEY_ENABLE; |
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_delay_us(10); // from logic analyzer chart |
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if (KEY_ON) { |
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matrix[row] |= (1<<col); |
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} else { |
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if (KEY_STATE) { |
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matrix[row] &= ~(1<<col); |
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} else { |
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matrix[row] |= (1<<col); |
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} |
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KEY_PREV_OFF; |
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KEY_UNABLE; |
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_delay_us(150); // from logic analyzer chart |
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} |