@@ -25,8 +25,10 @@ | |||
* @{ | |||
*/ | |||
#ifndef _CHCONF_H_ | |||
#define _CHCONF_H_ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
@@ -103,6 +105,10 @@ | |||
*/ | |||
#define CH_CFG_NO_IDLE_THREAD FALSE | |||
/* Use __WFI in the idle thread for waiting. Does lower the power | |||
* consumption. */ | |||
#define CORTEX_ENABLE_WFI_IDLE TRUE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
@@ -262,14 +268,6 @@ | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief I/O Queues APIs. | |||
* @details If enabled then the I/O queues APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_QUEUES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
@@ -357,12 +355,18 @@ | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the context switch circular trace buffer is | |||
* activated. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_ENABLE_TRACE FALSE | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
@@ -427,10 +431,6 @@ | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
* | |||
* @note It is inserted into lock zone. | |||
* @note It is also invoked when the threads simply return in order to | |||
* terminate. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
@@ -444,6 +444,20 @@ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
@@ -451,6 +465,7 @@ | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
@@ -460,6 +475,7 @@ | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
@@ -488,12 +504,21 @@ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* _CHCONF_H_ */ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@@ -25,8 +25,10 @@ | |||
* @{ | |||
*/ | |||
#ifndef _CHCONF_H_ | |||
#define _CHCONF_H_ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
@@ -266,14 +268,6 @@ | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief I/O Queues APIs. | |||
* @details If enabled then the I/O queues APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_QUEUES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
@@ -361,12 +355,18 @@ | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the context switch circular trace buffer is | |||
* activated. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_ENABLE_TRACE FALSE | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
@@ -431,10 +431,6 @@ | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
* | |||
* @note It is inserted into lock zone. | |||
* @note It is also invoked when the threads simply return in order to | |||
* terminate. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
@@ -448,6 +444,20 @@ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
@@ -455,6 +465,7 @@ | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
@@ -464,6 +475,7 @@ | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
@@ -492,12 +504,21 @@ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* _CHCONF_H_ */ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@@ -31,7 +31,7 @@ BOARD = GENERIC_STM32_F103 | |||
# MAPLE MINI | |||
# OPT_DEFS = -DCORTEX_VTOR_INIT=0x5000 | |||
# MCU_LDSCRIPT = STM32F103xE_maplemini_bootloader | |||
# MCU_LDSCRIPT = STM32F103xB_maplemini_bootloader | |||
# BOARD = MAPLEMINI_STM32_F103 | |||
## chip/board settings |
@@ -25,8 +25,10 @@ | |||
* @{ | |||
*/ | |||
#ifndef _CHCONF_H_ | |||
#define _CHCONF_H_ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
@@ -266,14 +268,6 @@ | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief I/O Queues APIs. | |||
* @details If enabled then the I/O queues APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_QUEUES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
@@ -361,12 +355,18 @@ | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the context switch circular trace buffer is | |||
* activated. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_ENABLE_TRACE FALSE | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
@@ -431,10 +431,6 @@ | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
* | |||
* @note It is inserted into lock zone. | |||
* @note It is also invoked when the threads simply return in order to | |||
* terminate. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
@@ -448,6 +444,20 @@ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
@@ -455,6 +465,7 @@ | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
@@ -464,6 +475,7 @@ | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
@@ -492,12 +504,21 @@ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* _CHCONF_H_ */ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@@ -1,53 +0,0 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. | |||
This file is part of ChibiOS. | |||
ChibiOS is free software; you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation; either version 3 of the License, or | |||
(at your option) any later version. | |||
ChibiOS is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
/* | |||
* ST32F103xB memory setup. | |||
*/ | |||
MEMORY | |||
{ | |||
flash : org = 0x08000000, len = 64k | |||
ram0 : org = 0x20000000, len = 20k | |||
ram1 : org = 0x00000000, len = 0 | |||
ram2 : org = 0x00000000, len = 0 | |||
ram3 : org = 0x00000000, len = 0 | |||
ram4 : org = 0x00000000, len = 0 | |||
ram5 : org = 0x00000000, len = 0 | |||
ram6 : org = 0x00000000, len = 0 | |||
ram7 : org = 0x00000000, len = 0 | |||
} | |||
/* RAM region to be used for Main stack. This stack accommodates the processing | |||
of all exceptions and interrupts*/ | |||
REGION_ALIAS("MAIN_STACK_RAM", ram0); | |||
/* RAM region to be used for the process stack. This is the stack used by | |||
the main() function.*/ | |||
REGION_ALIAS("PROCESS_STACK_RAM", ram0); | |||
/* RAM region to be used for data segment.*/ | |||
REGION_ALIAS("DATA_RAM", ram0); | |||
/* RAM region to be used for BSS segment.*/ | |||
REGION_ALIAS("BSS_RAM", ram0); | |||
/* RAM region to be used for the default heap.*/ | |||
REGION_ALIAS("HEAP_RAM", ram0); | |||
INCLUDE rules.ld |
@@ -1,40 +1,73 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
This file is part of ChibiOS. | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
ChibiOS is free software; you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation; either version 3 of the License, or | |||
(at your option) any later version. | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
ChibiOS is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* ST32F103xB memory setup. | |||
* ST32F103xB memory setup for use with the maplemini bootloader. | |||
* You will have to | |||
* #define CORTEX_VTOR_INIT 0x5000 | |||
* in your projects chconf.h | |||
*/ | |||
MEMORY | |||
{ | |||
flash : org = 0x08002000, len = 64k - 0x2000 | |||
ram0 : org = 0x20000C00, len = 20k - 0xC00 | |||
ram1 : org = 0x00000000, len = 0 | |||
ram2 : org = 0x00000000, len = 0 | |||
ram3 : org = 0x00000000, len = 0 | |||
ram4 : org = 0x00000000, len = 0 | |||
ram5 : org = 0x00000000, len = 0 | |||
ram6 : org = 0x00000000, len = 0 | |||
ram7 : org = 0x00000000, len = 0 | |||
flash0 : org = 0x08002000, len = 128k - 0x2000 | |||
flash1 : org = 0x00000000, len = 0 | |||
flash2 : org = 0x00000000, len = 0 | |||
flash3 : org = 0x00000000, len = 0 | |||
flash4 : org = 0x00000000, len = 0 | |||
flash5 : org = 0x00000000, len = 0 | |||
flash6 : org = 0x00000000, len = 0 | |||
flash7 : org = 0x00000000, len = 0 | |||
ram0 : org = 0x20000000, len = 20k | |||
ram1 : org = 0x00000000, len = 0 | |||
ram2 : org = 0x00000000, len = 0 | |||
ram3 : org = 0x00000000, len = 0 | |||
ram4 : org = 0x00000000, len = 0 | |||
ram5 : org = 0x00000000, len = 0 | |||
ram6 : org = 0x00000000, len = 0 | |||
ram7 : org = 0x00000000, len = 0 | |||
} | |||
/* For each data/text section two region are defined, a virtual region | |||
and a load region (_LMA suffix).*/ | |||
/* Flash region to be used for exception vectors.*/ | |||
REGION_ALIAS("VECTORS_FLASH", flash0); | |||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0); | |||
/* Flash region to be used for constructors and destructors.*/ | |||
REGION_ALIAS("XTORS_FLASH", flash0); | |||
REGION_ALIAS("XTORS_FLASH_LMA", flash0); | |||
/* Flash region to be used for code text.*/ | |||
REGION_ALIAS("TEXT_FLASH", flash0); | |||
REGION_ALIAS("TEXT_FLASH_LMA", flash0); | |||
/* Flash region to be used for read only data.*/ | |||
REGION_ALIAS("RODATA_FLASH", flash0); | |||
REGION_ALIAS("RODATA_FLASH_LMA", flash0); | |||
/* Flash region to be used for various.*/ | |||
REGION_ALIAS("VARIOUS_FLASH", flash0); | |||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); | |||
/* Flash region to be used for RAM(n) initialization data.*/ | |||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); | |||
/* RAM region to be used for Main stack. This stack accommodates the processing | |||
of all exceptions and interrupts*/ | |||
of all exceptions and interrupts.*/ | |||
REGION_ALIAS("MAIN_STACK_RAM", ram0); | |||
/* RAM region to be used for the process stack. This is the stack used by | |||
@@ -43,6 +76,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0); | |||
/* RAM region to be used for data segment.*/ | |||
REGION_ALIAS("DATA_RAM", ram0); | |||
REGION_ALIAS("DATA_RAM_LMA", flash0); | |||
/* RAM region to be used for BSS segment.*/ | |||
REGION_ALIAS("BSS_RAM", ram0); | |||
@@ -50,4 +84,5 @@ REGION_ALIAS("BSS_RAM", ram0); | |||
/* RAM region to be used for the default heap.*/ | |||
REGION_ALIAS("HEAP_RAM", ram0); | |||
/* Generic rules inclusion.*/ | |||
INCLUDE rules.ld |
@@ -25,8 +25,10 @@ | |||
* @{ | |||
*/ | |||
#ifndef _CHCONF_H_ | |||
#define _CHCONF_H_ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
@@ -178,7 +180,7 @@ | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE | |||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | |||
/** | |||
* @brief Mutexes APIs. | |||
@@ -266,14 +268,6 @@ | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief I/O Queues APIs. | |||
* @details If enabled then the I/O queues APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_QUEUES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
@@ -361,12 +355,18 @@ | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the context switch circular trace buffer is | |||
* activated. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_ENABLE_TRACE TRUE | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
@@ -431,10 +431,6 @@ | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
* | |||
* @note It is inserted into lock zone. | |||
* @note It is also invoked when the threads simply return in order to | |||
* terminate. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
@@ -448,6 +444,20 @@ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
@@ -455,6 +465,7 @@ | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
@@ -464,6 +475,7 @@ | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
@@ -492,12 +504,21 @@ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* _CHCONF_H_ */ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@@ -1,12 +1,14 @@ | |||
# Teensy LC, 3.0, 3.1, 3.2 support | |||
These ARM Teensies are now supported through [chibios](http://chibios.org). | |||
These ARM Teensies are now supported through [ChibiOS](http://chibios.org). | |||
You'll need to install an ARM toolchain, for instance from [gcc ARM embedded](https://launchpad.net/gcc-arm-embedded) website, or using your favourite package manager. After installing, you should be able to run `arm-none-eabi-gcc -v` in the command prompt and get sensible output. This toolchain is used instead of `avr-gcc`, which is only for AVR chips. Naturally you'll also need the usual development tools (e.g. `make`), just as in the AVR setting. | |||
You'll need this fork/branch of TMK. If you're reading this from your own hard drive, then you already have it ;) Anyway, you can get a zip from [here](https://github.com/flabbergast/tmk_keyboard/archive/chibios.zip) {or clone this repo from github and checkout the `chibios` branch}. | |||
Next, you'll need ChibiOS. For Teensies, you'll need code from two repositories: [chibios-main](https://github.com/ChibiOS/ChibiOS) and [chibios-contrib](https://github.com/ChibiOS/ChibiOS). If you're not using git, you can just download a [zip of chibios from here](https://github.com/ChibiOS/ChibiOS/archive/a7df9a891067621e8e1a5c2a2c0ceada82403afe.zip), unpack the zip, and rename/move the unpacked directory (named `ChibiOS-<long_hash_here>`) to `tmk_core/tool/chibios/chibios` (so that the file `tmk_core/tool/chibios/chibios/license.txt` exists). Now the same procedure with a [zip of chibios-contrib from here](https://github.com/ChibiOS/ChibiOS-Contrib/archive/e1311c4db6cd366cf760673f769e925741ac0ad3.zip): unpack and move `ChibiOS-Contrib-<long_hash_here>` to `tmk_core/tool/chibios/chibios-contrib`. | |||
Next, you'll need ChibiOS. The current release (3.0.4) does not have sufficient Kinetis support, so you'll need to get a patched version from [my fork](https://github.com/flabbergast/ChibiOS/tree/kinetis): you can download a current tree zipped from [here](https://github.com/flabbergast/ChibiOS/archive/kinetis.zip) {or clone that repo from github and checkout the `kinetis` branch}. Unpack the zip, rename the newly created `ChibiOS-kinetis` to `chibios`, and move it to `tmk/tool/chibios/` (so that the ChibiOS files reside in `tmk/tool/chibios/chibios`). | |||
(If you're using git, you can just clone the two repos: [chibios](https://github.com/ChibiOS/ChibiOS) and [chibios-contrib](https://github.com/ChibiOS/ChibiOS-Contrib). However - be warned that things may be somewhat out-of-sync (updates at different rates), so you may need to hunt a bit for the right commits.) | |||
(Why do we need chibios-contrib? Well, the main repo focuses on STM32 chips, and Freescale/NXP Kinetis chips are supported via the Contrib repository.) | |||
This should be it. Running `make` in `keyboard/teensy_lc_onekey` should create a working firmware in `build/`, called `ch.hex`. | |||
@@ -1,47 +1,86 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. | |||
This file is part of ChibiOS. | |||
ChibiOS is free software; you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation; either version 3 of the License, or | |||
(at your option) any later version. | |||
ChibiOS is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
* Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com | |||
* (C) 2016 flabbergast <[email protected]> | |||
* | |||
* Permission is hereby granted, free of charge, to any person obtaining | |||
* a copy of this software and associated documentation files (the "Software"), | |||
* to deal in the Software without restriction, including without limitation | |||
* the rights to use, copy, modify, merge, publish, distribute, sublicense, | |||
* and/or sell copies of the Software, and to permit persons to whom the | |||
* Software is furnished to do so, subject to the following conditions: | |||
* | |||
* The above copyright notice and this permission notice shall be included in | |||
* all copies or substantial portions of the Software. | |||
* | |||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS | |||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |||
* SOFTWARE. | |||
*/ | |||
/* | |||
* KL26Z64 memory setup. | |||
*/ | |||
MEMORY | |||
{ | |||
flash0 : org = 0x00000000, len = 0xc0 | |||
flashcfg : org = 0x00000400, len = 0x10 | |||
flash : org = 0x00000410, len = 62k - 0x410 | |||
eeprom_emu : org = 0x0000F800, len = 2k | |||
ram0 : org = 0x1FFFF800, len = 8k | |||
ram1 : org = 0x00000000, len = 0 | |||
ram2 : org = 0x00000000, len = 0 | |||
ram3 : org = 0x00000000, len = 0 | |||
ram4 : org = 0x00000000, len = 0 | |||
ram5 : org = 0x00000000, len = 0 | |||
ram6 : org = 0x00000000, len = 0 | |||
ram7 : org = 0x00000000, len = 0 | |||
flash0 : org = 0x00000000, len = 0x100 | |||
flash1 : org = 0x00000400, len = 0x10 | |||
flash2 : org = 0x00000410, len = 62k - 0x410 | |||
flash3 : org = 0x0000F800, len = 2k | |||
flash4 : org = 0x00000000, len = 0 | |||
flash5 : org = 0x00000000, len = 0 | |||
flash6 : org = 0x00000000, len = 0 | |||
flash7 : org = 0x00000000, len = 0 | |||
ram0 : org = 0x1FFFF800, len = 8k | |||
ram1 : org = 0x00000000, len = 0 | |||
ram2 : org = 0x00000000, len = 0 | |||
ram3 : org = 0x00000000, len = 0 | |||
ram4 : org = 0x00000000, len = 0 | |||
ram5 : org = 0x00000000, len = 0 | |||
ram6 : org = 0x00000000, len = 0 | |||
ram7 : org = 0x00000000, len = 0 | |||
} | |||
__eeprom_workarea_start__ = ORIGIN(eeprom_emu); | |||
__eeprom_workarea_size__ = LENGTH(eeprom_emu); | |||
__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__; | |||
/* Flash region for the configuration bytes.*/ | |||
SECTIONS | |||
{ | |||
.cfmprotect : ALIGN(4) SUBALIGN(4) | |||
{ | |||
KEEP(*(.cfmconfig)) | |||
} > flash1 | |||
} | |||
/* For each data/text section two region are defined, a virtual region | |||
and a load region (_LMA suffix).*/ | |||
/* Flash region to be used for exception vectors.*/ | |||
REGION_ALIAS("VECTORS_FLASH", flash0); | |||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0); | |||
/* Flash region to be used for constructors and destructors.*/ | |||
REGION_ALIAS("XTORS_FLASH", flash2); | |||
REGION_ALIAS("XTORS_FLASH_LMA", flash2); | |||
/* Flash region to be used for code text.*/ | |||
REGION_ALIAS("TEXT_FLASH", flash2); | |||
REGION_ALIAS("TEXT_FLASH_LMA", flash2); | |||
/* Flash region to be used for read only data.*/ | |||
REGION_ALIAS("RODATA_FLASH", flash2); | |||
REGION_ALIAS("RODATA_FLASH_LMA", flash2); | |||
/* Flash region to be used for various.*/ | |||
REGION_ALIAS("VARIOUS_FLASH", flash2); | |||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); | |||
/* Flash region to be used for RAM(n) initialization data.*/ | |||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); | |||
/* RAM region to be used for Main stack. This stack accommodates the processing | |||
of all exceptions and interrupts*/ | |||
of all exceptions and interrupts.*/ | |||
REGION_ALIAS("MAIN_STACK_RAM", ram0); | |||
/* RAM region to be used for the process stack. This is the stack used by | |||
@@ -50,6 +89,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0); | |||
/* RAM region to be used for data segment.*/ | |||
REGION_ALIAS("DATA_RAM", ram0); | |||
REGION_ALIAS("DATA_RAM_LMA", flash2); | |||
/* RAM region to be used for BSS segment.*/ | |||
REGION_ALIAS("BSS_RAM", ram0); | |||
@@ -57,4 +97,9 @@ REGION_ALIAS("BSS_RAM", ram0); | |||
/* RAM region to be used for the default heap.*/ | |||
REGION_ALIAS("HEAP_RAM", ram0); | |||
INCLUDE ld/rules_kinetis.ld | |||
__eeprom_workarea_start__ = ORIGIN(flash3); | |||
__eeprom_workarea_size__ = LENGTH(flash3); | |||
__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__; | |||
/* Generic rules inclusion.*/ | |||
INCLUDE rules.ld |