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Chibios: updates for 3.0.4 git.

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This commit is contained in:
flabbergast 2015-12-21 08:45:26 +00:00
parent 8952d617ea
commit dbbd4e8f8d
5 changed files with 50 additions and 123 deletions
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7
keyboard/infinity_chibios/halconf.h
View File

@ -163,6 +163,13 @@
#define HAL_USE_USB TRUE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/

7
keyboard/stm32_f103_onekey/halconf.h
View File

@ -163,6 +163,13 @@
#define HAL_USE_USB TRUE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/

7
keyboard/stm32_onekey/halconf.h
View File

@ -163,6 +163,13 @@
#define HAL_USE_USB TRUE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/

7
keyboard/teensy_lc_onekey/halconf.h
View File

@ -163,6 +163,13 @@
#define HAL_USE_USB TRUE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
#endif /* _HALCONF_H_ */
/** @} */

145
keyboard/teensy_lc_onekey/ld/MKL26Z64.ld
View File

@ -18,144 +18,43 @@
*/
/*
* KL25Z64 memory setup.
* KL26Z64 memory setup.
*/
ENTRY(Reset_Handler)
MEMORY
{
flash0 : org = 0x00000000, len = 0xc0
flashcfg : org = 0x00000400, len = 0x10
flash : org = 0x00000410, len = 62k - 0x410
eeprom_emu : org = 0x0000F800, len = 2k
ram : org = 0x1FFFF800, len = 8k
ram0 : org = 0x1FFFF800, len = 8k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
ram3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0
}
__ram_start__ = ORIGIN(ram);
__ram_size__ = LENGTH(ram);
__ram_end__ = __ram_start__ + __ram_size__;
__eeprom_workarea_start__ = ORIGIN(eeprom_emu);
__eeprom_workarea_size__ = LENGTH(eeprom_emu);
__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__;
SECTIONS
{
. = 0;
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
.isr : ALIGN(4) SUBALIGN(4)
{
KEEP(*(.vectors))
} > flash0
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
.cfmprotect : ALIGN(4) SUBALIGN(4)
{
KEEP(*(.cfmconfig))
} > flashcfg
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
_text = .;
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
constructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
} > flash
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
destructors : ALIGN(4) SUBALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
} > flash
.text : ALIGN(4) SUBALIGN(4)
{
*(.text)
*(.text.*)
*(.rodata)
*(.rodata.*)
*(.glue_7t)
*(.glue_7)
*(.gcc*)
} > flash
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > flash
.ARM.exidx : {
PROVIDE(__exidx_start = .);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
PROVIDE(__exidx_end = .);
} > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
} > flash
.textalign : ONLY_IF_RO
{
. = ALIGN(8);
} > flash
_etext = .;
_textdata = _etext;
.stacks :
{
. = ALIGN(8);
__main_stack_base__ = .;
. += __main_stack_size__;
. = ALIGN(8);
__main_stack_end__ = .;
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
. += __process_stack_size__;
. = ALIGN(8);
__process_stack_end__ = .;
__main_thread_stack_end__ = .;
} > ram
.data :
{
. = ALIGN(4);
PROVIDE(_data = .);
*(.data)
. = ALIGN(4);
*(.data.*)
. = ALIGN(4);
*(.ramtext)
. = ALIGN(4);
PROVIDE(_edata = .);
} > ram AT > flash
.bss :
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
*(.bss)
. = ALIGN(4);
*(.bss.*)
. = ALIGN(4);
*(COMMON)
. = ALIGN(4);
PROVIDE(_bss_end = .);
} > ram
}
PROVIDE(end = .);
_end = .;
__heap_base__ = _end;
__heap_end__ = __ram_end__;
INCLUDE ld/rules_kinetis.ld