Keyboard firmwares for Atmel AVR and Cortex-M
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  1. /* Copyright (c) 2010-2011 mbed.org, MIT License
  2. *
  3. * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
  4. * and associated documentation files (the "Software"), to deal in the Software without
  5. * restriction, including without limitation the rights to use, copy, modify, merge, publish,
  6. * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
  7. * Software is furnished to do so, subject to the following conditions:
  8. *
  9. * The above copyright notice and this permission notice shall be included in all copies or
  10. * substantial portions of the Software.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  13. * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  14. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
  15. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  16. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  17. */
  18. #if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1)
  19. #include "USBHAL.h"
  20. USBHAL * USBHAL::instance;
  21. static volatile int epComplete = 0;
  22. // Convert physical endpoint number to register bit
  23. #define EP(endpoint) (1<<(endpoint))
  24. // Convert physical to logical
  25. #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
  26. // Get endpoint direction
  27. #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
  28. #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
  29. #define BD_OWN_MASK (1<<7)
  30. #define BD_DATA01_MASK (1<<6)
  31. #define BD_KEEP_MASK (1<<5)
  32. #define BD_NINC_MASK (1<<4)
  33. #define BD_DTS_MASK (1<<3)
  34. #define BD_STALL_MASK (1<<2)
  35. #define TX 1
  36. #define RX 0
  37. #define ODD 0
  38. #define EVEN 1
  39. // this macro waits a physical endpoint number
  40. #define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd)))
  41. #define SETUP_TOKEN 0x0D
  42. #define IN_TOKEN 0x09
  43. #define OUT_TOKEN 0x01
  44. #define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F)
  45. // for each endpt: 8 bytes
  46. typedef struct BDT {
  47. uint8_t info; // BD[0:7]
  48. uint8_t dummy; // RSVD: BD[8:15]
  49. uint16_t byte_count; // BD[16:32]
  50. uint32_t address; // Addr
  51. } BDT;
  52. // there are:
  53. // * 16 bidirectionnal endpt -> 32 physical endpt
  54. // * as there are ODD and EVEN buffer -> 32*2 bdt
  55. __attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
  56. uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2];
  57. uint8_t * endpoint_buffer_iso[2*2];
  58. static uint8_t set_addr = 0;
  59. static uint8_t addr = 0;
  60. static uint32_t Data1 = 0x55555555;
  61. static uint32_t frameNumber() {
  62. return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
  63. }
  64. uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
  65. return 0;
  66. }
  67. USBHAL::USBHAL(void) {
  68. // Disable IRQ
  69. NVIC_DisableIRQ(USB0_IRQn);
  70. #if defined(TARGET_K64F)
  71. MPU->CESR=0;
  72. #endif
  73. // fill in callback array
  74. epCallback[0] = &USBHAL::EP1_OUT_callback;
  75. epCallback[1] = &USBHAL::EP1_IN_callback;
  76. epCallback[2] = &USBHAL::EP2_OUT_callback;
  77. epCallback[3] = &USBHAL::EP2_IN_callback;
  78. epCallback[4] = &USBHAL::EP3_OUT_callback;
  79. epCallback[5] = &USBHAL::EP3_IN_callback;
  80. epCallback[6] = &USBHAL::EP4_OUT_callback;
  81. epCallback[7] = &USBHAL::EP4_IN_callback;
  82. epCallback[8] = &USBHAL::EP5_OUT_callback;
  83. epCallback[9] = &USBHAL::EP5_IN_callback;
  84. epCallback[10] = &USBHAL::EP6_OUT_callback;
  85. epCallback[11] = &USBHAL::EP6_IN_callback;
  86. epCallback[12] = &USBHAL::EP7_OUT_callback;
  87. epCallback[13] = &USBHAL::EP7_IN_callback;
  88. epCallback[14] = &USBHAL::EP8_OUT_callback;
  89. epCallback[15] = &USBHAL::EP8_IN_callback;
  90. epCallback[16] = &USBHAL::EP9_OUT_callback;
  91. epCallback[17] = &USBHAL::EP9_IN_callback;
  92. epCallback[18] = &USBHAL::EP10_OUT_callback;
  93. epCallback[19] = &USBHAL::EP10_IN_callback;
  94. epCallback[20] = &USBHAL::EP11_OUT_callback;
  95. epCallback[21] = &USBHAL::EP11_IN_callback;
  96. epCallback[22] = &USBHAL::EP12_OUT_callback;
  97. epCallback[23] = &USBHAL::EP12_IN_callback;
  98. epCallback[24] = &USBHAL::EP13_OUT_callback;
  99. epCallback[25] = &USBHAL::EP13_IN_callback;
  100. epCallback[26] = &USBHAL::EP14_OUT_callback;
  101. epCallback[27] = &USBHAL::EP14_IN_callback;
  102. epCallback[28] = &USBHAL::EP15_OUT_callback;
  103. epCallback[29] = &USBHAL::EP15_IN_callback;
  104. #if defined(TARGET_KL43Z)
  105. // enable USBFS clock
  106. SIM->SCGC4 |= SIM_SCGC4_USBFS_MASK;
  107. // enable the IRC48M clock
  108. USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
  109. // enable the USB clock recovery tuning
  110. USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
  111. // choose usb src clock
  112. SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK;
  113. #else
  114. // choose usb src as PLL
  115. SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
  116. SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
  117. // enable OTG clock
  118. SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
  119. #endif
  120. // Attach IRQ
  121. instance = this;
  122. NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
  123. NVIC_EnableIRQ(USB0_IRQn);
  124. // USB Module Configuration
  125. // Reset USB Module
  126. USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
  127. while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
  128. // Set BDT Base Register
  129. USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8);
  130. USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16);
  131. USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24);
  132. // Clear interrupt flag
  133. USB0->ISTAT = 0xff;
  134. // USB Interrupt Enablers
  135. USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
  136. USB_INTEN_SOFTOKEN_MASK |
  137. USB_INTEN_ERROREN_MASK |
  138. USB_INTEN_USBRSTEN_MASK;
  139. // Disable weak pull downs
  140. USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
  141. USB0->USBTRC0 |= 0x40;
  142. }
  143. USBHAL::~USBHAL(void) { }
  144. void USBHAL::connect(void) {
  145. // enable USB
  146. USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
  147. // Pull up enable
  148. USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
  149. }
  150. void USBHAL::disconnect(void) {
  151. // disable USB
  152. USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
  153. // Pull up disable
  154. USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
  155. //Free buffers if required:
  156. for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) {
  157. free(endpoint_buffer[i]);
  158. endpoint_buffer[i] = NULL;
  159. }
  160. free(endpoint_buffer_iso[2]);
  161. endpoint_buffer_iso[2] = NULL;
  162. free(endpoint_buffer_iso[0]);
  163. endpoint_buffer_iso[0] = NULL;
  164. }
  165. void USBHAL::configureDevice(void) {
  166. // not needed
  167. }
  168. void USBHAL::unconfigureDevice(void) {
  169. // not needed
  170. }
  171. void USBHAL::setAddress(uint8_t address) {
  172. // we don't set the address now otherwise the usb controller does not ack
  173. // we set a flag instead
  174. // see usbisr when an IN token is received
  175. set_addr = 1;
  176. addr = address;
  177. }
  178. bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
  179. uint32_t handshake_flag = 0;
  180. uint8_t * buf;
  181. if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
  182. return false;
  183. }
  184. uint32_t log_endpoint = PHY_TO_LOG(endpoint);
  185. if ((flags & ISOCHRONOUS) == 0) {
  186. handshake_flag = USB_ENDPT_EPHSHK_MASK;
  187. if (IN_EP(endpoint)) {
  188. if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL)
  189. endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64*2);
  190. buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
  191. } else {
  192. if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL)
  193. endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64*2);
  194. buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
  195. }
  196. } else {
  197. if (IN_EP(endpoint)) {
  198. if (endpoint_buffer_iso[2] == NULL)
  199. endpoint_buffer_iso[2] = (uint8_t *) malloc (1023*2);
  200. buf = &endpoint_buffer_iso[2][0];
  201. } else {
  202. if (endpoint_buffer_iso[0] == NULL)
  203. endpoint_buffer_iso[0] = (uint8_t *) malloc (1023*2);
  204. buf = &endpoint_buffer_iso[0][0];
  205. }
  206. }
  207. // IN endpt -> device to host (TX)
  208. if (IN_EP(endpoint)) {
  209. USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
  210. USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
  211. bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
  212. bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
  213. }
  214. // OUT endpt -> host to device (RX)
  215. else {
  216. USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
  217. USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
  218. bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
  219. bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
  220. bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_OWN_MASK | BD_DTS_MASK;
  221. bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
  222. }
  223. Data1 |= (1 << endpoint);
  224. return true;
  225. }
  226. // read setup packet
  227. void USBHAL::EP0setup(uint8_t *buffer) {
  228. uint32_t sz;
  229. endpointReadResult(EP0OUT, buffer, &sz);
  230. }
  231. void USBHAL::EP0readStage(void) {
  232. Data1 &= ~1UL; // set DATA0
  233. bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK);
  234. }
  235. void USBHAL::EP0read(void) {
  236. uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0);
  237. bdt[idx].byte_count = MAX_PACKET_SIZE_EP0;
  238. }
  239. uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
  240. uint32_t sz;
  241. endpointReadResult(EP0OUT, buffer, &sz);
  242. return sz;
  243. }
  244. void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
  245. endpointWrite(EP0IN, buffer, size);
  246. }
  247. void USBHAL::EP0getWriteResult(void) {
  248. }
  249. void USBHAL::EP0stall(void) {
  250. stallEndpoint(EP0OUT);
  251. }
  252. EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
  253. endpoint = PHY_TO_LOG(endpoint);
  254. uint32_t idx = EP_BDT_IDX(endpoint, RX, 0);
  255. bdt[idx].byte_count = maximumSize;
  256. return EP_PENDING;
  257. }
  258. EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
  259. uint32_t n, sz, idx, setup = 0;
  260. uint8_t not_iso;
  261. uint8_t * ep_buf;
  262. uint32_t log_endpoint = PHY_TO_LOG(endpoint);
  263. if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
  264. return EP_INVALID;
  265. }
  266. // if read on a IN endpoint -> error
  267. if (IN_EP(endpoint)) {
  268. return EP_INVALID;
  269. }
  270. idx = EP_BDT_IDX(log_endpoint, RX, 0);
  271. sz = bdt[idx].byte_count;
  272. not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
  273. //for isochronous endpoint, we don't wait an interrupt
  274. if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
  275. return EP_PENDING;
  276. }
  277. if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
  278. setup = 1;
  279. }
  280. // non iso endpoint
  281. if (not_iso) {
  282. ep_buf = endpoint_buffer[idx];
  283. } else {
  284. ep_buf = endpoint_buffer_iso[0];
  285. }
  286. for (n = 0; n < sz; n++) {
  287. buffer[n] = ep_buf[n];
  288. }
  289. if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) {
  290. if (setup && (buffer[6] == 0)) // if no setup data stage,
  291. Data1 &= ~1UL; // set DATA0
  292. else
  293. Data1 ^= (1 << endpoint);
  294. }
  295. if (((Data1 >> endpoint) & 1)) {
  296. bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK;
  297. }
  298. else {
  299. bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK;
  300. }
  301. USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
  302. *bytesRead = sz;
  303. epComplete &= ~EP(endpoint);
  304. return EP_COMPLETED;
  305. }
  306. EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
  307. uint32_t idx, n;
  308. uint8_t * ep_buf;
  309. if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
  310. return EP_INVALID;
  311. }
  312. // if write on a OUT endpoint -> error
  313. if (OUT_EP(endpoint)) {
  314. return EP_INVALID;
  315. }
  316. idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
  317. bdt[idx].byte_count = size;
  318. // non iso endpoint
  319. if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) {
  320. ep_buf = endpoint_buffer[idx];
  321. } else {
  322. ep_buf = endpoint_buffer_iso[2];
  323. }
  324. for (n = 0; n < size; n++) {
  325. ep_buf[n] = data[n];
  326. }
  327. if ((Data1 >> endpoint) & 1) {
  328. bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
  329. } else {
  330. bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
  331. }
  332. Data1 ^= (1 << endpoint);
  333. return EP_PENDING;
  334. }
  335. EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
  336. if (epComplete & EP(endpoint)) {
  337. epComplete &= ~EP(endpoint);
  338. return EP_COMPLETED;
  339. }
  340. return EP_PENDING;
  341. }
  342. void USBHAL::stallEndpoint(uint8_t endpoint) {
  343. USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
  344. }
  345. void USBHAL::unstallEndpoint(uint8_t endpoint) {
  346. USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
  347. }
  348. bool USBHAL::getEndpointStallState(uint8_t endpoint) {
  349. uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
  350. return (stall) ? true : false;
  351. }
  352. void USBHAL::remoteWakeup(void) {
  353. // [TODO]
  354. }
  355. void USBHAL::_usbisr(void) {
  356. instance->usbisr();
  357. }
  358. void USBHAL::usbisr(void) {
  359. uint8_t i;
  360. uint8_t istat = USB0->ISTAT;
  361. // reset interrupt
  362. if (istat & USB_ISTAT_USBRST_MASK) {
  363. // disable all endpt
  364. for(i = 0; i < 16; i++) {
  365. USB0->ENDPOINT[i].ENDPT = 0x00;
  366. }
  367. // enable control endpoint
  368. realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
  369. realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
  370. Data1 = 0x55555555;
  371. USB0->CTL |= USB_CTL_ODDRST_MASK;
  372. USB0->ISTAT = 0xFF; // clear all interrupt status flags
  373. USB0->ERRSTAT = 0xFF; // clear all error flags
  374. USB0->ERREN = 0xFF; // enable error interrupt sources
  375. USB0->ADDR = 0x00; // set default address
  376. return;
  377. }
  378. // resume interrupt
  379. if (istat & USB_ISTAT_RESUME_MASK) {
  380. USB0->ISTAT = USB_ISTAT_RESUME_MASK;
  381. }
  382. // SOF interrupt
  383. if (istat & USB_ISTAT_SOFTOK_MASK) {
  384. USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
  385. // SOF event, read frame number
  386. SOF(frameNumber());
  387. }
  388. // stall interrupt
  389. if (istat & 1<<7) {
  390. if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK)
  391. USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
  392. USB0->ISTAT |= USB_ISTAT_STALL_MASK;
  393. }
  394. // token interrupt
  395. if (istat & 1<<3) {
  396. uint32_t num = (USB0->STAT >> 4) & 0x0F;
  397. uint32_t dir = (USB0->STAT >> 3) & 0x01;
  398. uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
  399. // setup packet
  400. if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
  401. Data1 &= ~0x02;
  402. bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK;
  403. bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK;
  404. // EP0 SETUP event (SETUP data received)
  405. EP0setupCallback();
  406. } else {
  407. // OUT packet
  408. if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
  409. if (num == 0)
  410. EP0out();
  411. else {
  412. epComplete |= (1 << EP(num));
  413. if ((instance->*(epCallback[EP(num) - 2]))()) {
  414. epComplete &= ~(1 << EP(num));
  415. }
  416. }
  417. }
  418. // IN packet
  419. if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
  420. if (num == 0) {
  421. EP0in();
  422. if (set_addr == 1) {
  423. USB0->ADDR = addr & 0x7F;
  424. set_addr = 0;
  425. }
  426. }
  427. else {
  428. epComplete |= (1 << (EP(num) + 1));
  429. if ((instance->*(epCallback[EP(num) + 1 - 2]))()) {
  430. epComplete &= ~(1 << (EP(num) + 1));
  431. }
  432. }
  433. }
  434. }
  435. USB0->ISTAT = USB_ISTAT_TOKDNE_MASK;
  436. }
  437. // sleep interrupt
  438. if (istat & 1<<4) {
  439. USB0->ISTAT |= USB_ISTAT_SLEEP_MASK;
  440. }
  441. // error interrupt
  442. if (istat & USB_ISTAT_ERROR_MASK) {
  443. USB0->ERRSTAT = 0xFF;
  444. USB0->ISTAT |= USB_ISTAT_ERROR_MASK;
  445. }
  446. }
  447. #endif