Keyboard firmwares for Atmel AVR and Cortex-M
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ps2.c 9.9KB

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  1. /*
  2. Copyright 2010,2011,2012,2013 Jun WAKO <[email protected]>
  3. This software is licensed with a Modified BSD License.
  4. All of this is supposed to be Free Software, Open Source, DFSG-free,
  5. GPL-compatible, and OK to use in both free and proprietary applications.
  6. Additions and corrections to this file are welcome.
  7. Redistribution and use in source and binary forms, with or without
  8. modification, are permitted provided that the following conditions are met:
  9. * Redistributions of source code must retain the above copyright
  10. notice, this list of conditions and the following disclaimer.
  11. * Redistributions in binary form must reproduce the above copyright
  12. notice, this list of conditions and the following disclaimer in
  13. the documentation and/or other materials provided with the
  14. distribution.
  15. * Neither the name of the copyright holders nor the names of
  16. contributors may be used to endorse or promote products derived
  17. from this software without specific prior written permission.
  18. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20. IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21. ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  22. LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  23. CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  24. SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  25. INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  26. CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  28. POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #include <stdbool.h>
  31. #include <avr/io.h>
  32. #include <avr/interrupt.h>
  33. #include <util/delay.h>
  34. #include "ps2.h"
  35. #include "debug.h"
  36. #ifndef PS2_USE_INT
  37. static uint8_t recv_data(void);
  38. #endif
  39. static inline void clock_lo(void);
  40. static inline void clock_hi(void);
  41. static inline bool clock_in(void);
  42. static inline void data_lo(void);
  43. static inline void data_hi(void);
  44. static inline bool data_in(void);
  45. static inline uint16_t wait_clock_lo(uint16_t us);
  46. static inline uint16_t wait_clock_hi(uint16_t us);
  47. static inline uint16_t wait_data_lo(uint16_t us);
  48. static inline uint16_t wait_data_hi(uint16_t us);
  49. static inline void idle(void);
  50. static inline void inhibit(void);
  51. /*
  52. Primitive PS/2 Library for AVR
  53. ==============================
  54. Host side is only supported now.
  55. I/O control
  56. -----------
  57. High state is asserted by input with pull up.
  58. PS/2 References
  59. ---------------
  60. http://www.computer-engineering.org/ps2protocol/
  61. http://www.mcamafia.de/pdf/ibm_hitrc07.pdf
  62. */
  63. #define WAIT(stat, us, err) do { \
  64. if (!wait_##stat(us)) { \
  65. ps2_error = err; \
  66. goto ERROR; \
  67. } \
  68. } while (0)
  69. uint8_t ps2_error = PS2_ERR_NONE;
  70. void ps2_host_init(void)
  71. {
  72. #ifdef PS2_USE_INT
  73. PS2_INT_INIT();
  74. PS2_INT_ON();
  75. idle();
  76. #else
  77. inhibit();
  78. #endif
  79. }
  80. // TODO: send using interrupt if available
  81. uint8_t ps2_host_send(uint8_t data)
  82. {
  83. uint8_t res = 0;
  84. bool parity = true;
  85. ps2_error = PS2_ERR_NONE;
  86. #ifdef PS2_USE_INT
  87. PS2_INT_OFF();
  88. #endif
  89. /* terminate a transmission if we have */
  90. inhibit();
  91. _delay_us(200); // at least 100us
  92. /* start bit [1] */
  93. data_lo();
  94. clock_hi();
  95. WAIT(clock_lo, 20000, 10); // may take 15ms at most until device starts clocking
  96. /* data [2-9] */
  97. for (uint8_t i = 0; i < 8; i++) {
  98. _delay_us(15);
  99. if (data&(1<<i)) {
  100. parity = !parity;
  101. data_hi();
  102. } else {
  103. data_lo();
  104. }
  105. WAIT(clock_hi, 50, 2);
  106. WAIT(clock_lo, 50, 3);
  107. }
  108. /* parity [10] */
  109. _delay_us(15);
  110. if (parity) { data_hi(); } else { data_lo(); }
  111. WAIT(clock_hi, 50, 4);
  112. WAIT(clock_lo, 50, 5);
  113. /* stop bit [11] */
  114. _delay_us(15);
  115. data_hi();
  116. /* ack [12] */
  117. WAIT(data_lo, 50, 6);
  118. WAIT(clock_lo, 50, 7);
  119. /* wait for idle state */
  120. WAIT(clock_hi, 50, 8);
  121. WAIT(data_hi, 50, 9);
  122. #ifdef PS2_USE_INT
  123. PS2_INT_ON();
  124. #endif
  125. res = ps2_host_recv_response();
  126. ERROR:
  127. #ifdef PS2_USE_INT
  128. PS2_INT_ON();
  129. idle();
  130. #else
  131. inhibit();
  132. #endif
  133. return res;
  134. }
  135. #ifndef PS2_USE_INT
  136. /* receive data when host want else inhibit communication */
  137. uint8_t ps2_host_recv_response(void)
  138. {
  139. uint8_t data = 0;
  140. #ifdef PS2_USE_INT
  141. PS2_INT_OFF();
  142. #endif
  143. /* terminate a transmission if we have */
  144. inhibit();
  145. _delay_us(100);
  146. /* release lines(idle state) */
  147. idle();
  148. /* wait start bit */
  149. wait_clock_lo(25000); // command response may take 20 ms at most
  150. data = recv_data();
  151. inhibit();
  152. return data;
  153. }
  154. #endif
  155. #ifndef PS2_USE_INT
  156. uint8_t ps2_host_recv(void)
  157. {
  158. return ps2_host_recv_response();
  159. }
  160. #else
  161. /* ring buffer to store ps/2 key data */
  162. #define PBUF_SIZE 32
  163. static uint8_t pbuf[PBUF_SIZE];
  164. static uint8_t pbuf_head = 0;
  165. static uint8_t pbuf_tail = 0;
  166. static inline void pbuf_enqueue(uint8_t data)
  167. {
  168. uint8_t sreg = SREG;
  169. cli();
  170. uint8_t next = (pbuf_head + 1) % PBUF_SIZE;
  171. if (next != pbuf_tail) {
  172. pbuf[pbuf_head] = data;
  173. pbuf_head = next;
  174. } else {
  175. debug("pbuf: full\n");
  176. }
  177. SREG = sreg;
  178. }
  179. static inline uint8_t pbuf_dequeue(void)
  180. {
  181. uint8_t val = 0;
  182. uint8_t sreg = SREG;
  183. cli();
  184. if (pbuf_head != pbuf_tail) {
  185. val = pbuf[pbuf_tail];
  186. pbuf_tail = (pbuf_tail + 1) % PBUF_SIZE;
  187. }
  188. SREG = sreg;
  189. return val;
  190. }
  191. static inline bool pbuf_has_data(void)
  192. {
  193. uint8_t sreg = SREG;
  194. cli();
  195. bool has_data = (pbuf_head != pbuf_tail);
  196. SREG = sreg;
  197. return has_data;
  198. }
  199. static inline void pbuf_clear(void)
  200. {
  201. uint8_t sreg = SREG;
  202. cli();
  203. pbuf_head = pbuf_tail = 0;
  204. SREG = sreg;
  205. }
  206. /* get data received by interrupt */
  207. uint8_t ps2_host_recv(void)
  208. {
  209. if (ps2_error) {
  210. print("x");
  211. phex(ps2_error);
  212. ps2_host_send(0xFE); // request to resend
  213. ps2_error = PS2_ERR_NONE;
  214. }
  215. idle();
  216. return pbuf_dequeue();
  217. }
  218. uint8_t ps2_host_recv_response(void)
  219. {
  220. while (!pbuf_has_data()) ;
  221. return pbuf_dequeue();
  222. }
  223. ISR(PS2_INT_VECT)
  224. {
  225. static enum {
  226. INIT,
  227. START,
  228. BIT0, BIT1, BIT2, BIT3, BIT4, BIT5, BIT6, BIT7,
  229. PARITY,
  230. STOP,
  231. } state = INIT;
  232. static uint8_t data = 0;
  233. static uint8_t parity = 1;
  234. // TODO: abort if elapse 100us from previous interrupt
  235. // return unless falling edge
  236. if (clock_in()) {
  237. goto RETURN;
  238. }
  239. state++;
  240. switch (state) {
  241. case START:
  242. if (data_in())
  243. goto ERROR;
  244. break;
  245. case BIT0:
  246. case BIT1:
  247. case BIT2:
  248. case BIT3:
  249. case BIT4:
  250. case BIT5:
  251. case BIT6:
  252. case BIT7:
  253. data >>= 1;
  254. if (data_in()) {
  255. data |= 0x80;
  256. parity++;
  257. }
  258. break;
  259. case PARITY:
  260. if (data_in()) {
  261. if (!(parity & 0x01))
  262. goto ERROR;
  263. } else {
  264. if (parity & 0x01)
  265. goto ERROR;
  266. }
  267. break;
  268. case STOP:
  269. if (!data_in())
  270. goto ERROR;
  271. pbuf_enqueue(data);
  272. //phex(data);
  273. goto DONE;
  274. break;
  275. default:
  276. goto ERROR;
  277. }
  278. goto RETURN;
  279. ERROR:
  280. inhibit();
  281. ps2_error = state;
  282. DONE:
  283. state = INIT;
  284. data = 0;
  285. parity = 1;
  286. RETURN:
  287. return;
  288. }
  289. #endif
  290. /* send LED state to keyboard */
  291. void ps2_host_set_led(uint8_t led)
  292. {
  293. ps2_host_send(0xED);
  294. ps2_host_send(led);
  295. }
  296. #ifndef PS2_USE_INT
  297. /* called after start bit comes */
  298. static uint8_t recv_data(void)
  299. {
  300. uint8_t data = 0;
  301. bool parity = true;
  302. ps2_error = PS2_ERR_NONE;
  303. /* start bit [1] */
  304. WAIT(clock_lo, 1, 1);
  305. WAIT(data_lo, 1, 2);
  306. WAIT(clock_hi, 50, 3);
  307. /* data [2-9] */
  308. for (uint8_t i = 0; i < 8; i++) {
  309. WAIT(clock_lo, 50, 4);
  310. if (data_in()) {
  311. parity = !parity;
  312. data |= (1<<i);
  313. }
  314. WAIT(clock_hi, 50, 5);
  315. }
  316. /* parity [10] */
  317. WAIT(clock_lo, 50, 6);
  318. if (data_in() != parity) {
  319. ps2_error = PS2_ERR_PARITY;
  320. goto ERROR;
  321. }
  322. WAIT(clock_hi, 50, 7);
  323. /* stop bit [11] */
  324. WAIT(clock_lo, 50, 8);
  325. WAIT(data_hi, 1, 9);
  326. WAIT(clock_hi, 50, 10);
  327. return data;
  328. ERROR:
  329. return 0;
  330. }
  331. #endif
  332. static inline void clock_lo()
  333. {
  334. PS2_CLOCK_PORT &= ~(1<<PS2_CLOCK_BIT);
  335. PS2_CLOCK_DDR |= (1<<PS2_CLOCK_BIT);
  336. }
  337. static inline void clock_hi()
  338. {
  339. /* input with pull up */
  340. PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);
  341. PS2_CLOCK_PORT |= (1<<PS2_CLOCK_BIT);
  342. }
  343. static inline bool clock_in()
  344. {
  345. PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);
  346. PS2_CLOCK_PORT |= (1<<PS2_CLOCK_BIT);
  347. _delay_us(1);
  348. return PS2_CLOCK_PIN&(1<<PS2_CLOCK_BIT);
  349. }
  350. static inline void data_lo()
  351. {
  352. PS2_DATA_PORT &= ~(1<<PS2_DATA_BIT);
  353. PS2_DATA_DDR |= (1<<PS2_DATA_BIT);
  354. }
  355. static inline void data_hi()
  356. {
  357. /* input with pull up */
  358. PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);
  359. PS2_DATA_PORT |= (1<<PS2_DATA_BIT);
  360. }
  361. static inline bool data_in()
  362. {
  363. PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);
  364. PS2_DATA_PORT |= (1<<PS2_DATA_BIT);
  365. _delay_us(1);
  366. return PS2_DATA_PIN&(1<<PS2_DATA_BIT);
  367. }
  368. static inline uint16_t wait_clock_lo(uint16_t us)
  369. {
  370. while (clock_in() && us) { asm(""); _delay_us(1); us--; }
  371. return us;
  372. }
  373. static inline uint16_t wait_clock_hi(uint16_t us)
  374. {
  375. while (!clock_in() && us) { asm(""); _delay_us(1); us--; }
  376. return us;
  377. }
  378. static inline uint16_t wait_data_lo(uint16_t us)
  379. {
  380. while (data_in() && us) { asm(""); _delay_us(1); us--; }
  381. return us;
  382. }
  383. static inline uint16_t wait_data_hi(uint16_t us)
  384. {
  385. while (!data_in() && us) { asm(""); _delay_us(1); us--; }
  386. return us;
  387. }
  388. /* idle state that device can send */
  389. static inline void idle(void)
  390. {
  391. clock_hi();
  392. data_hi();
  393. }
  394. /* inhibit device to send */
  395. static inline void inhibit(void)
  396. {
  397. clock_lo();
  398. data_hi();
  399. }