474 regels
12 KiB
C++
474 regels
12 KiB
C++
/*******************************************************************************
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* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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#if defined(TARGET_Maxim)
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#include "USBHAL.h"
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#include "usb_regs.h"
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#include "clkman_regs.h"
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#define CONNECT_INTS (MXC_F_USB_DEV_INTEN_BRST | MXC_F_USB_DEV_INTEN_SETUP | MXC_F_USB_DEV_INTEN_EP_IN | MXC_F_USB_DEV_INTEN_EP_OUT | MXC_F_USB_DEV_INTEN_DMA_ERR)
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USBHAL *USBHAL::instance;
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typedef struct {
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volatile uint32_t buf0_desc;
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volatile uint32_t buf0_address;
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volatile uint32_t buf1_desc;
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volatile uint32_t buf1_address;
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} ep_buffer_t;
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typedef struct {
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ep_buffer_t out_buffer;
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ep_buffer_t in_buffer;
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} ep0_buffer_t;
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typedef struct {
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ep0_buffer_t ep0;
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ep_buffer_t ep[MXC_USB_NUM_EP - 1];
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} ep_buffer_descriptor_t;
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// Static storage for endpoint buffer descriptor table. Must be 512 byte alligned for DMA.
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#ifdef __IAR_SYSTEMS_ICC__
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#pragma data_alignment = 512
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#else
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__attribute__ ((aligned (512)))
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#endif
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ep_buffer_descriptor_t ep_buffer_descriptor;
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// static storage for temporary data buffers. Must be 32 byte alligned.
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#ifdef __IAR_SYSTEMS_ICC__
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#pragma data_alignment = 4
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#else
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__attribute__ ((aligned (4)))
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#endif
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static uint8_t aligned_buffer[NUMBER_OF_LOGICAL_ENDPOINTS][MXC_USB_MAX_PACKET];
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// contorl packet state
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static enum {
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CTRL_NONE = 0,
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CTRL_SETUP,
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CTRL_OUT,
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CTRL_IN,
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} control_state;
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USBHAL::USBHAL(void)
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{
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NVIC_DisableIRQ(USB_IRQn);
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// The PLL must be enabled for USB
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MBED_ASSERT(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE);
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// Enable the USB clock
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MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N;
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// reset the device
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MXC_USB->cn = 0;
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MXC_USB->cn = 1;
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MXC_USB->dev_inten = 0;
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MXC_USB->dev_cn = 0;
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MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
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MXC_USB->dev_cn = 0;
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// fill in callback arrays
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epCallback[EP0OUT] = NULL;
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epCallback[EP0IN] = NULL;
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epCallback[EP1OUT] = &USBHAL::EP1_OUT_callback;
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epCallback[EP1IN ] = &USBHAL::EP1_IN_callback;
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epCallback[EP2OUT] = &USBHAL::EP2_OUT_callback;
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epCallback[EP2IN ] = &USBHAL::EP2_IN_callback;
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epCallback[EP3OUT] = &USBHAL::EP3_OUT_callback;
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epCallback[EP3IN ] = &USBHAL::EP3_IN_callback;
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epCallback[EP4OUT] = &USBHAL::EP4_OUT_callback;
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epCallback[EP4IN ] = &USBHAL::EP4_IN_callback;
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epCallback[EP5OUT] = &USBHAL::EP5_OUT_callback;
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epCallback[EP5IN ] = &USBHAL::EP5_IN_callback;
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epCallback[EP6OUT] = &USBHAL::EP6_OUT_callback;
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epCallback[EP6IN ] = &USBHAL::EP6_IN_callback;
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epCallback[EP7OUT] = &USBHAL::EP7_OUT_callback;
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epCallback[EP7IN ] = &USBHAL::EP7_IN_callback;
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// clear driver state
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control_state = CTRL_NONE;
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// set the descriptor location
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MXC_USB->ep_base = (uint32_t)&ep_buffer_descriptor;
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// attach IRQ handler and enable interrupts
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instance = this;
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NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
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NVIC_EnableIRQ(USB_IRQn);
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}
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USBHAL::~USBHAL(void)
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{
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MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
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MXC_USB->dev_cn = 0;
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MXC_USB->cn = 0;
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}
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void USBHAL::connect(void)
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{
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// enable interrupts
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MXC_USB->dev_inten |= CONNECT_INTS;
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// allow interrupts on ep0
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MXC_USB->ep[0] |= MXC_F_USB_EP_INT_EN;
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// pullup enable
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MXC_USB->dev_cn |= (MXC_F_USB_DEV_CN_CONNECT | MXC_F_USB_DEV_CN_FIFO_MODE);
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}
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void USBHAL::disconnect(void)
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{
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// disable interrupts
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MXC_USB->dev_inten &= ~CONNECT_INTS;
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// disable pullup
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MXC_USB->dev_cn &= ~MXC_F_USB_DEV_CN_CONNECT;
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}
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void USBHAL::configureDevice(void)
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{
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// do nothing
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}
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void USBHAL::unconfigureDevice(void)
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{
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// reset endpoints
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for (int i = 0; i < MXC_USB_NUM_EP; i++) {
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// Disable endpoint and clear the data toggle
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MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
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MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
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}
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}
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void USBHAL::setAddress(uint8_t address)
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{
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// do nothing
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}
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void USBHAL::remoteWakeup(void)
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{
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// do nothing
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}
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static ep_buffer_t *get_desc(uint8_t endpoint)
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{
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uint8_t epnum = EP_NUM(endpoint);
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ep_buffer_t *desc;
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if (epnum == 0) {
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if (IN_EP(endpoint)) {
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desc = &ep_buffer_descriptor.ep0.in_buffer;
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} else {
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desc = &ep_buffer_descriptor.ep0.out_buffer;
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}
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} else {
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desc = &ep_buffer_descriptor.ep[epnum - 1];
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}
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return desc;
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}
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void USBHAL::EP0setup(uint8_t *buffer)
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{
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memcpy(buffer, (void*)&MXC_USB->setup0, 8); // setup packet is fixed at 8 bytes
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}
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void USBHAL::EP0read(void)
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{
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if (control_state == CTRL_IN) {
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// This is the status stage. ACK.
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MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
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control_state = CTRL_NONE;
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return;
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}
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control_state = CTRL_OUT;
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endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
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}
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void USBHAL::EP0readStage(void)
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{
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// do nothing
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}
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uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
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{
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uint32_t size;
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if (MXC_USB->out_owner & 1) {
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return 0;
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}
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// get the packet length and contents
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ep_buffer_t *desc = get_desc(EP0OUT);
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size = desc->buf0_desc;
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memcpy(buffer, aligned_buffer[0], size);
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return size;
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}
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void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
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{
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if ((size == 0) && (control_state != CTRL_IN)) {
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// This is a status stage ACK. Handle in hardware.
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MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
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control_state = CTRL_NONE;
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return;
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}
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control_state = CTRL_IN;
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endpointWrite(EP0IN, buffer, size);
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}
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void USBHAL::EP0stall(void)
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{
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stallEndpoint(0);
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}
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EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
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{
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uint8_t epnum = EP_NUM(endpoint);
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if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
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return EP_INVALID;
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}
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if (maximumSize > MXC_USB_MAX_PACKET) {
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return EP_INVALID;
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}
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uint32_t mask = (1 << epnum);
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if (MXC_USB->out_owner & mask) {
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return EP_INVALID;
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}
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ep_buffer_t *desc = get_desc(endpoint);
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desc->buf0_desc = maximumSize;
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desc->buf0_address = (uint32_t)aligned_buffer[epnum];
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MXC_USB->out_owner = mask;
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return EP_PENDING;
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}
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EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead)
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{
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if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
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return EP_INVALID;
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}
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uint32_t mask = (1 << EP_NUM(endpoint));
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if (MXC_USB->out_owner & mask) {
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return EP_PENDING;
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}
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// get the packet length and contents
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ep_buffer_t *desc = get_desc(endpoint);
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*bytesRead = desc->buf0_desc;
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memcpy(data, aligned_buffer[EP_NUM(endpoint)], *bytesRead);
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return EP_COMPLETED;
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}
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EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
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{
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uint8_t epnum = EP_NUM(endpoint);
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if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || OUT_EP(endpoint)) {
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return EP_INVALID;
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}
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if (size > MXC_USB_MAX_PACKET) {
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return EP_INVALID;
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}
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uint32_t mask = (1 << epnum);
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if (MXC_USB->in_owner & mask) {
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return EP_INVALID;
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}
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memcpy(aligned_buffer[epnum], data, size);
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ep_buffer_t *desc = get_desc(endpoint);
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desc->buf0_desc = size;
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desc->buf0_address = (uint32_t)aligned_buffer[epnum];
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// start the DMA
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MXC_USB->in_owner = mask;
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return EP_PENDING;
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}
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EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
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{
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uint32_t mask = (1 << EP_NUM(endpoint));
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if (MXC_USB->in_owner & mask) {
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return EP_PENDING;
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}
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return EP_COMPLETED;
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}
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void USBHAL::stallEndpoint(uint8_t endpoint)
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{
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uint8_t epnum = EP_NUM(endpoint);
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if (epnum == 0) {
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MXC_USB->ep[epnum] |= MXC_F_USB_EP_ST_STALL;
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}
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MXC_USB->ep[epnum] |= MXC_F_USB_EP_STALL;
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}
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void USBHAL::unstallEndpoint(uint8_t endpoint)
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{
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MXC_USB->ep[EP_NUM(endpoint)] &= ~MXC_F_USB_EP_STALL;
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}
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bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options)
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{
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uint8_t epnum = EP_NUM(endpoint);
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uint32_t ep_ctrl;
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if (epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) {
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return false;
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}
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if (IN_EP(endpoint)) {
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ep_ctrl = (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS);
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} else {
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ep_ctrl = (MXC_S_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS);
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}
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ep_ctrl |= (MXC_F_USB_EP_DT | MXC_F_USB_EP_INT_EN);
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MXC_USB->ep[epnum] = ep_ctrl;
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return true;
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}
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bool USBHAL::getEndpointStallState(unsigned char endpoint)
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{
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return !!(MXC_USB->ep[endpoint] & MXC_F_USB_EP_STALL);
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}
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void USBHAL::_usbisr(void)
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{
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instance->usbisr();
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}
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void USBHAL::usbisr(void)
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{
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// get and clear irqs
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uint32_t irq_flags = MXC_USB->dev_intfl;
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MXC_USB->dev_intfl = irq_flags;
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// process only enabled interrupts
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irq_flags &= MXC_USB->dev_inten;
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// suspend
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if (irq_flags & MXC_F_USB_DEV_INTFL_SUSP) {
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suspendStateChanged(1);
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}
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// bus reset
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if (irq_flags & MXC_F_USB_DEV_INTFL_BRST) {
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// reset endpoints
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for (int i = 0; i < MXC_USB_NUM_EP; i++) {
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// Disable endpoint and clear the data toggle
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MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
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MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
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}
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// clear driver state
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control_state = CTRL_NONE;
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busReset();
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// no need to process events after reset
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return;
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}
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// Setup packet
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if (irq_flags & MXC_F_USB_DEV_INTFL_SETUP) {
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control_state = CTRL_SETUP;
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EP0setupCallback();
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}
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// IN packets
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if (irq_flags & MXC_F_USB_DEV_INTFL_EP_IN) {
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// get and clear IN irqs
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uint32_t in_irqs = MXC_USB->in_int;
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MXC_USB->in_int = in_irqs;
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if (in_irqs & 1) {
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EP0in();
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}
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for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
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uint32_t irq_mask = (1 << epnum);
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if (in_irqs & irq_mask) {
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uint8_t endpoint = (epnum << 1) | DIR_IN;
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(instance->*(epCallback[endpoint]))();
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}
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}
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}
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// OUT packets
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if (irq_flags & MXC_F_USB_DEV_INTFL_EP_OUT) {
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// get and clear OUT irqs
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uint32_t out_irqs = MXC_USB->out_int;
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MXC_USB->out_int = out_irqs;
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if (out_irqs & 1) {
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EP0out();
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}
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for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
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uint32_t irq_mask = (1 << epnum);
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if (out_irqs & irq_mask) {
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uint8_t endpoint = (epnum << 1) | DIR_OUT;
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(instance->*(epCallback[endpoint]))();
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}
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}
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}
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}
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#endif
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