Keyboard firmwares for Atmel AVR and Cortex-M
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

usb0_host_controlrw.c 17KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434
  1. /*******************************************************************************
  2. * DISCLAIMER
  3. * This software is supplied by Renesas Electronics Corporation and is only
  4. * intended for use with Renesas products. No other uses are authorized. This
  5. * software is owned by Renesas Electronics Corporation and is protected under
  6. * all applicable laws, including copyright laws.
  7. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
  8. * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
  9. * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
  10. * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
  11. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
  12. * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
  13. * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
  14. * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
  15. * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
  16. * Renesas reserves the right, without notice, to make changes to this software
  17. * and to discontinue the availability of this software. By using this software,
  18. * you agree to the additional terms and conditions found by accessing the
  19. * following link:
  20. * http://www.renesas.com/disclaimer
  21. * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
  22. *******************************************************************************/
  23. /*******************************************************************************
  24. * File Name : usb0_host_controlrw.c
  25. * $Rev: 1116 $
  26. * $Date:: 2014-07-09 16:29:19 +0900#$
  27. * Device(s) : RZ/A1H
  28. * Tool-Chain :
  29. * OS : None
  30. * H/W Platform :
  31. * Description : RZ/A1H R7S72100 USB Sample Program
  32. * Operation :
  33. * Limitations :
  34. *******************************************************************************/
  35. /*******************************************************************************
  36. Includes <System Includes> , "Project Includes"
  37. *******************************************************************************/
  38. #include "usb0_host.h"
  39. #include "dev_drv.h"
  40. /*******************************************************************************
  41. Typedef definitions
  42. *******************************************************************************/
  43. /*******************************************************************************
  44. Macro definitions
  45. *******************************************************************************/
  46. /*******************************************************************************
  47. Imported global variables and functions (from other files)
  48. *******************************************************************************/
  49. /*******************************************************************************
  50. Exported global variables and functions (to be accessed by other files)
  51. *******************************************************************************/
  52. /*******************************************************************************
  53. Private global variables and functions
  54. *******************************************************************************/
  55. /*******************************************************************************
  56. * Function Name: usb0_host_CtrlTransStart
  57. * Description : Executes USB control transfer.
  58. * Arguments : uint16_t devadr ; device address
  59. * : uint16_t Req ; bmRequestType & bRequest
  60. * : uint16_t Val ; wValue
  61. * : uint16_t Indx ; wIndex
  62. * : uint16_t Len ; wLength
  63. * : uint8_t *Buf ; Data buffer
  64. * Return Value : DEVDRV_SUCCESS ; SUCCESS
  65. * : DEVDRV_ERROR ; ERROR
  66. *******************************************************************************/
  67. int32_t usb0_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
  68. uint16_t Indx, uint16_t Len, uint8_t * Buf)
  69. {
  70. if (g_usb0_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
  71. {
  72. RZA_IO_RegWrite_16(&USB200.SOFCFG,
  73. 1,
  74. USB_SOFCFG_TRNENSEL_SHIFT,
  75. USB_SOFCFG_TRNENSEL);
  76. }
  77. else
  78. {
  79. RZA_IO_RegWrite_16(&USB200.SOFCFG,
  80. 0,
  81. USB_SOFCFG_TRNENSEL_SHIFT,
  82. USB_SOFCFG_TRNENSEL);
  83. }
  84. USB200.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb0_host_default_max_packet[devadr]);
  85. if (g_usb0_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
  86. {
  87. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
  88. g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
  89. g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
  90. if (Len == 0)
  91. {
  92. g_usb0_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
  93. }
  94. else
  95. {
  96. if ((Req & 0x0080) != 0)
  97. {
  98. g_usb0_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
  99. }
  100. else
  101. {
  102. g_usb0_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
  103. }
  104. }
  105. g_usb0_host_SavReq = Req; /* save request */
  106. g_usb0_host_SavVal = Val;
  107. g_usb0_host_SavIndx = Indx;
  108. g_usb0_host_SavLen = Len;
  109. }
  110. else
  111. {
  112. if ((g_usb0_host_SavReq != Req) || (g_usb0_host_SavVal != Val)
  113. || (g_usb0_host_SavIndx != Indx) || (g_usb0_host_SavLen != Len))
  114. {
  115. return DEVDRV_ERROR;
  116. }
  117. }
  118. switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
  119. {
  120. /* --------------- SETUP STAGE --------------- */
  121. case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
  122. usb0_host_SetupStage(Req, Val, Indx, Len);
  123. break;
  124. case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
  125. /* do nothing */
  126. break;
  127. case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
  128. g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
  129. switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
  130. {
  131. case USB_HOST_MODE_WRITE:
  132. g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
  133. g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
  134. break;
  135. case USB_HOST_MODE_READ:
  136. g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
  137. g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
  138. break;
  139. case USB_HOST_MODE_NO_DATA:
  140. g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
  141. g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
  142. break;
  143. default:
  144. break;
  145. }
  146. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  147. g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
  148. break;
  149. case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
  150. if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
  151. {
  152. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
  153. }
  154. else
  155. {
  156. g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
  157. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  158. g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
  159. }
  160. break;
  161. /* --------------- DATA STAGE --------------- */
  162. case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
  163. switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
  164. {
  165. case USB_HOST_MODE_WRITE:
  166. usb0_host_CtrlWriteStart((uint32_t)Len, Buf);
  167. break;
  168. case USB_HOST_MODE_READ:
  169. usb0_host_CtrlReadStart((uint32_t)Len, Buf);
  170. break;
  171. default:
  172. break;
  173. }
  174. break;
  175. case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
  176. /* do nothing */
  177. break;
  178. case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
  179. g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
  180. g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
  181. g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
  182. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  183. g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
  184. break;
  185. case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
  186. if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
  187. {
  188. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
  189. }
  190. else
  191. {
  192. g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
  193. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  194. g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
  195. usb0_host_clear_pid_stall(USB_HOST_PIPE0);
  196. usb0_host_set_pid_buf(USB_HOST_PIPE0);
  197. }
  198. break;
  199. case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
  200. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
  201. break;
  202. /* --------------- STATUS STAGE --------------- */
  203. case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
  204. usb0_host_StatusStage();
  205. break;
  206. case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
  207. /* do nothing */
  208. break;
  209. case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
  210. usb0_host_set_pid_nak(USB_HOST_PIPE0);
  211. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
  212. break;
  213. case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
  214. if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
  215. {
  216. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
  217. }
  218. else
  219. {
  220. g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
  221. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  222. g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
  223. usb0_host_clear_pid_stall(USB_HOST_PIPE0);
  224. usb0_host_set_pid_buf(USB_HOST_PIPE0);
  225. }
  226. break;
  227. case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
  228. g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
  229. break;
  230. default:
  231. break;
  232. }
  233. if (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
  234. {
  235. RZA_IO_RegWrite_16(&USB200.SOFCFG,
  236. 0,
  237. USB_SOFCFG_TRNENSEL_SHIFT,
  238. USB_SOFCFG_TRNENSEL);
  239. }
  240. return DEVDRV_SUCCESS;
  241. }
  242. /*******************************************************************************
  243. * Function Name: usb0_host_SetupStage
  244. * Description : Executes USB control transfer/set up stage.
  245. * Arguments : uint16_t Req ; bmRequestType & bRequest
  246. * : uint16_t Val ; wValue
  247. * : uint16_t Indx ; wIndex
  248. * : uint16_t Len ; wLength
  249. * Return Value : none
  250. *******************************************************************************/
  251. void usb0_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
  252. {
  253. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  254. g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
  255. USB200.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
  256. USB200.USBREQ = Req;
  257. USB200.USBVAL = Val;
  258. USB200.USBINDX = Indx;
  259. USB200.USBLENG = Len;
  260. USB200.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
  261. }
  262. /*******************************************************************************
  263. * Function Name: usb0_host_StatusStage
  264. * Description : Executes USB control transfer/status stage.
  265. * Arguments : none
  266. * Return Value : none
  267. *******************************************************************************/
  268. void usb0_host_StatusStage (void)
  269. {
  270. uint8_t Buf1[16];
  271. switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
  272. {
  273. case USB_HOST_MODE_READ:
  274. usb0_host_CtrlWriteStart((uint32_t)0, (uint8_t *)&Buf1);
  275. break;
  276. case USB_HOST_MODE_WRITE:
  277. usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
  278. break;
  279. case USB_HOST_MODE_NO_DATA:
  280. usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
  281. break;
  282. default:
  283. break;
  284. }
  285. }
  286. /*******************************************************************************
  287. * Function Name: usb0_host_CtrlWriteStart
  288. * Description : Executes USB control transfer/data stage(write).
  289. * Arguments : uint32_t Bsize ; Data Size
  290. * : uint8_t *Table ; Data Table Address
  291. * Return Value : USB_HOST_WRITESHRT ; End of data write
  292. * : USB_HOST_WRITEEND ; End of data write (not null)
  293. * : USB_HOST_WRITING ; Continue of data write
  294. * : USB_HOST_FIFOERROR ; FIFO access error
  295. *******************************************************************************/
  296. uint16_t usb0_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
  297. {
  298. uint16_t EndFlag_K;
  299. uint16_t mbw;
  300. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  301. g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
  302. usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
  303. g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
  304. g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
  305. USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
  306. #if(1) /* ohci_wrapp */
  307. Userdef_USB_usb0_host_delay_10us(3);
  308. #endif
  309. RZA_IO_RegWrite_16(&USB200.DCPCFG,
  310. 1,
  311. USB_DCPCFG_DIR_SHIFT,
  312. USB_DCPCFG_DIR);
  313. mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
  314. usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
  315. USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
  316. usb0_host_clear_pid_stall(USB_HOST_PIPE0);
  317. EndFlag_K = usb0_host_write_buffer_c(USB_HOST_PIPE0);
  318. /* Host Control sequence */
  319. switch (EndFlag_K)
  320. {
  321. case USB_HOST_WRITESHRT: /* End of data write */
  322. g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
  323. g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
  324. usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
  325. usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
  326. break;
  327. case USB_HOST_WRITEEND: /* End of data write (not null) */
  328. case USB_HOST_WRITING: /* Continue of data write */
  329. usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
  330. usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
  331. break;
  332. case USB_HOST_FIFOERROR: /* FIFO access error */
  333. break;
  334. default:
  335. break;
  336. }
  337. usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
  338. return (EndFlag_K); /* End or Err or Continue */
  339. }
  340. /*******************************************************************************
  341. * Function Name: usb0_host_CtrlReadStart
  342. * Description : Executes USB control transfer/data stage(read).
  343. * Arguments : uint32_t Bsize ; Data Size
  344. * : uint8_t *Table ; Data Table Address
  345. * Return Value : none
  346. *******************************************************************************/
  347. void usb0_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
  348. {
  349. uint16_t mbw;
  350. g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
  351. g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
  352. usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
  353. g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
  354. g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
  355. USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
  356. #if(1) /* ohci_wrapp */
  357. Userdef_USB_usb0_host_delay_10us(3);
  358. #endif
  359. RZA_IO_RegWrite_16(&USB200.DCPCFG,
  360. 0,
  361. USB_DCPCFG_DIR_SHIFT,
  362. USB_DCPCFG_DIR);
  363. mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
  364. usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
  365. USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
  366. usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
  367. usb0_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
  368. usb0_host_clear_pid_stall(USB_HOST_PIPE0);
  369. usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
  370. }
  371. /* End of File */