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arm_lms_norm_init_q31.c 4.0KB

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  1. /*-----------------------------------------------------------------------------
  2. * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 17. January 2013
  5. * $Revision: V1.4.1
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_lms_norm_init_q31.c
  9. *
  10. * Description: Q31 NLMS initialization function.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------*/
  40. #include "arm_math.h"
  41. #include "arm_common_tables.h"
  42. /**
  43. * @addtogroup LMS_NORM
  44. * @{
  45. */
  46. /**
  47. * @brief Initialization function for Q31 normalized LMS filter.
  48. * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
  49. * @param[in] numTaps number of filter coefficients.
  50. * @param[in] *pCoeffs points to coefficient buffer.
  51. * @param[in] *pState points to state buffer.
  52. * @param[in] mu step size that controls filter coefficient updates.
  53. * @param[in] blockSize number of samples to process.
  54. * @param[in] postShift bit shift applied to coefficients.
  55. * @return none.
  56. *
  57. * <b>Description:</b>
  58. * \par
  59. * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
  60. * <pre>
  61. * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  62. * </pre>
  63. * The initial filter coefficients serve as a starting point for the adaptive filter.
  64. * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
  65. * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
  66. */
  67. void arm_lms_norm_init_q31(
  68. arm_lms_norm_instance_q31 * S,
  69. uint16_t numTaps,
  70. q31_t * pCoeffs,
  71. q31_t * pState,
  72. q31_t mu,
  73. uint32_t blockSize,
  74. uint8_t postShift)
  75. {
  76. /* Assign filter taps */
  77. S->numTaps = numTaps;
  78. /* Assign coefficient pointer */
  79. S->pCoeffs = pCoeffs;
  80. /* Clear state buffer and size is always blockSize + numTaps - 1 */
  81. memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
  82. /* Assign post Shift value applied to coefficients */
  83. S->postShift = postShift;
  84. /* Assign state pointer */
  85. S->pState = pState;
  86. /* Assign Step size value */
  87. S->mu = mu;
  88. /* Initialize reciprocal pointer table */
  89. S->recipTable = (q31_t *) armRecipTableQ31;
  90. /* Initialise Energy to zero */
  91. S->energy = 0;
  92. /* Initialise x0 to zero */
  93. S->x0 = 0;
  94. }
  95. /**
  96. * @} end of LMS_NORM group
  97. */