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arm_copy_q31.c 3.6KB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 17. January 2013
  5. * $Revision: V1.4.1
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_copy_q31.c
  9. *
  10. * Description: Copies the elements of a Q31 vector.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupSupport
  43. */
  44. /**
  45. * @addtogroup copy
  46. * @{
  47. */
  48. /**
  49. * @brief Copies the elements of a Q31 vector.
  50. * @param[in] *pSrc points to input vector
  51. * @param[out] *pDst points to output vector
  52. * @param[in] blockSize length of the input vector
  53. * @return none.
  54. *
  55. */
  56. void arm_copy_q31(
  57. q31_t * pSrc,
  58. q31_t * pDst,
  59. uint32_t blockSize)
  60. {
  61. uint32_t blkCnt; /* loop counter */
  62. #ifndef ARM_MATH_CM0_FAMILY
  63. /* Run the below code for Cortex-M4 and Cortex-M3 */
  64. q31_t in1, in2, in3, in4;
  65. /*loop Unrolling */
  66. blkCnt = blockSize >> 2u;
  67. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  68. ** a second loop below computes the remaining 1 to 3 samples. */
  69. while(blkCnt > 0u)
  70. {
  71. /* C = A */
  72. /* Copy and then store the values in the destination buffer */
  73. in1 = *pSrc++;
  74. in2 = *pSrc++;
  75. in3 = *pSrc++;
  76. in4 = *pSrc++;
  77. *pDst++ = in1;
  78. *pDst++ = in2;
  79. *pDst++ = in3;
  80. *pDst++ = in4;
  81. /* Decrement the loop counter */
  82. blkCnt--;
  83. }
  84. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  85. ** No loop unrolling is used. */
  86. blkCnt = blockSize % 0x4u;
  87. #else
  88. /* Run the below code for Cortex-M0 */
  89. /* Loop over blockSize number of values */
  90. blkCnt = blockSize;
  91. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  92. while(blkCnt > 0u)
  93. {
  94. /* C = A */
  95. /* Copy and then store the value in the destination buffer */
  96. *pDst++ = *pSrc++;
  97. /* Decrement the loop counter */
  98. blkCnt--;
  99. }
  100. }
  101. /**
  102. * @} end of BasicCopy group
  103. */