171 行
3.8 KiB
C
171 行
3.8 KiB
C
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/*
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* light weight WS2812 lib V2.0b
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*
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* Controls WS2811/WS2812/WS2812B RGB-LEDs
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* Author: Tim (cpldcpu@gmail.com)
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*
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* Jan 18th, 2014 v2.0b Initial Version
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*
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* License: GNU GPL v2 (see License.txt)
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*/
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#include "light_ws2812.h"
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <util/delay.h>
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void inline ws2812_setleds(struct cRGB *ledarray, uint16_t leds)
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{
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ws2812_setleds_pin(ledarray,leds, _BV(ws2812_pin));
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}
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void inline ws2812_setleds_pin(struct cRGB *ledarray, uint16_t leds, uint8_t pinmask)
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{
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ws2812_DDRREG |= pinmask; // Enable DDR
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ws2812_sendarray_mask((uint8_t*)ledarray,leds+leds+leds,pinmask);
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_delay_us(50);
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}
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void ws2812_sendarray(uint8_t *data,uint16_t datlen)
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{
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ws2812_sendarray_mask(data,datlen,_BV(ws2812_pin));
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}
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/*
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This routine writes an array of bytes with RGB values to the Dataout pin
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using the fast 800kHz clockless WS2811/2812 protocol.
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*/
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// Timing in ns
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#define w_zeropulse 350
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#define w_onepulse 900
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#define w_totalperiod 1250
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// Fixed cycles used by the inner loop
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#define w_fixedlow 2
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#define w_fixedhigh 4
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#define w_fixedtotal 8
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// Insert NOPs to match the timing, if possible
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#define w_zerocycles (((F_CPU/1000)*w_zeropulse )/1000000)
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#define w_onecycles (((F_CPU/1000)*w_onepulse +500000)/1000000)
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#define w_totalcycles (((F_CPU/1000)*w_totalperiod +500000)/1000000)
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// w1 - nops between rising edge and falling edge - low
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#define w1 (w_zerocycles-w_fixedlow)
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// w2 nops between fe low and fe high
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#define w2 (w_onecycles-w_fixedhigh-w1)
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// w3 nops to complete loop
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#define w3 (w_totalcycles-w_fixedtotal-w1-w2)
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#if w1>0
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#define w1_nops w1
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#else
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#define w1_nops 0
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#endif
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// The only critical timing parameter is the minimum pulse length of the "0"
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// Warn or throw error if this timing can not be met with current F_CPU settings.
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#define w_lowtime ((w1_nops+w_fixedlow)*1000000)/(F_CPU/1000)
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#if w_lowtime>550
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#error "Light_ws2812: Sorry, the clock speed is too low. Did you set F_CPU correctly?"
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#elif w_lowtime>450
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#warning "Light_ws2812: The timing is critical and may only work on WS2812B, not on WS2812(S)."
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#warning "Please consider a higher clockspeed, if possible"
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#endif
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#if w2>0
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#define w2_nops w2
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#else
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#define w2_nops 0
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#endif
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#if w3>0
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#define w3_nops w3
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#else
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#define w3_nops 0
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#endif
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#define w_nop1 "nop \n\t"
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#define w_nop2 "rjmp .+0 \n\t"
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#define w_nop4 w_nop2 w_nop2
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#define w_nop8 w_nop4 w_nop4
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#define w_nop16 w_nop8 w_nop8
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void inline ws2812_sendarray_mask(uint8_t *data,uint16_t datlen,uint8_t maskhi)
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{
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uint8_t curbyte,ctr,masklo;
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uint8_t sreg_prev;
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masklo =~maskhi&ws2812_PORTREG;
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maskhi |= ws2812_PORTREG;
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sreg_prev=SREG;
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cli();
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while (datlen--) {
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curbyte=*data++;
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asm volatile(
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" ldi %0,8 \n\t"
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"loop%=: \n\t"
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" out %2,%3 \n\t" // '1' [01] '0' [01] - re
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#if (w1_nops&1)
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w_nop1
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#endif
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#if (w1_nops&2)
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w_nop2
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#endif
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#if (w1_nops&4)
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w_nop4
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#endif
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#if (w1_nops&8)
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w_nop8
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#endif
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#if (w1_nops&16)
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w_nop16
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#endif
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" sbrs %1,7 \n\t" // '1' [03] '0' [02]
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" out %2,%4 \n\t" // '1' [--] '0' [03] - fe-low
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" lsl %1 \n\t" // '1' [04] '0' [04]
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#if (w2_nops&1)
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w_nop1
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#endif
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#if (w2_nops&2)
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w_nop2
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#endif
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#if (w2_nops&4)
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w_nop4
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#endif
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#if (w2_nops&8)
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w_nop8
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#endif
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#if (w2_nops&16)
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w_nop16
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#endif
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" out %2,%4 \n\t" // '1' [+1] '0' [+1] - fe-high
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#if (w3_nops&1)
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w_nop1
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#endif
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#if (w3_nops&2)
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w_nop2
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#endif
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#if (w3_nops&4)
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w_nop4
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#endif
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#if (w3_nops&8)
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w_nop8
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#endif
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#if (w3_nops&16)
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w_nop16
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#endif
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" dec %0 \n\t" // '1' [+2] '0' [+2]
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" brne loop%=\n\t" // '1' [+3] '0' [+4]
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: "=&d" (ctr)
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: "r" (curbyte), "I" (_SFR_IO_ADDR(ws2812_PORTREG)), "r" (maskhi), "r" (masklo)
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);
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}
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SREG=sreg_prev;
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}
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