Add support for GH60 PCB revB and revC
This commit is contained in:
parent
820e665f99
commit
bcc9b518f5
@ -135,40 +135,87 @@ uint8_t matrix_key_count(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Column pin configuration
|
/* Column pin configuration
|
||||||
* col: 0 1 2 3 4 5 6 7 8 9 10 11 12 13
|
* revC pin: F1 F0 E6 D7 D6 D4 C7 C6 B7 B5 B4 B3 B1 B0
|
||||||
* pin: F0 F1 E6 C7 C6 B6 D4 B1 B0 B5 B4 D7 D6 B3
|
* revB pin: F1 F0 E6 D7 D6 D4 C7 C6 B7 B6 B5 B4 B3 B1
|
||||||
|
* revA pin: F1 F0 E6 D7 D6 D4 C7 C6 B6 B5 B4 B3 B1 B0
|
||||||
*/
|
*/
|
||||||
static void init_cols(void)
|
static void init_cols(void)
|
||||||
{
|
{
|
||||||
// Input with pull-up(DDR:0, PORT:1)
|
// Input with pull-up(DDR:0, PORT:1)
|
||||||
DDRF &= ~(1<<0 | 1<<1);
|
DDRF &= ~(1<<PF1 | 1<<PF0);
|
||||||
PORTF |= (1<<0 | 1<<1);
|
PORTF |= (1<<PF1 | 1<<PF0);
|
||||||
DDRE &= ~(1<<6);
|
DDRE &= ~(1<<PE6);
|
||||||
PORTE |= (1<<6);
|
PORTE |= (1<<PE6);
|
||||||
DDRD &= ~(1<<7 | 1<<6 | 1<<4);
|
DDRD &= ~(1<<PD7 | 1<<PD6 | 1<<PD4);
|
||||||
PORTD |= (1<<7 | 1<<6 | 1<<4);
|
PORTD |= (1<<PD7 | 1<<PD6 | 1<<PD4);
|
||||||
DDRC &= ~(1<<7 | 1<<6);
|
DDRC &= ~(1<<PC7 | 1<<PC6);
|
||||||
PORTC |= (1<<7 | 1<<6);
|
PORTC |= (1<<PC7 | 1<<PC6);
|
||||||
DDRB &= ~(1<<6 | 1<< 5 | 1<<4 | 1<<3 | 1<<1 | 1<<0);
|
#if defined(GH60_REV_C)
|
||||||
PORTB |= (1<<6 | 1<< 5 | 1<<4 | 1<<3 | 1<<1 | 1<<0);
|
DDRB &= ~(1<<PB7 | 1<<PB5 | 1<<PB4 | 1<<PB3 | 1<<PB1 | 1<<PB0);
|
||||||
|
PORTB |= (1<<PB7 | 1<<PB5 | 1<<PB4 | 1<<PB3 | 1<<PB1 | 1<<PB0);
|
||||||
|
#elif defined(GH60_REV_B)
|
||||||
|
DDRB &= ~(1<<PB7 | 1<<PB6 | 1<<PB5 | 1<<PB4 | 1<<PB3 | 1<<PB1);
|
||||||
|
PORTB |= (1<<PB7 | 1<<PB6 | 1<<PB5 | 1<<PB4 | 1<<PB3 | 1<<PB1);
|
||||||
|
#else
|
||||||
|
DDRB &= ~(1<<PB6 | 1<<PB5 | 1<<PB4 | 1<<PB3 | 1<<PB1 | 1<<PB0);
|
||||||
|
PORTB |= (1<<PB6 | 1<<PB5 | 1<<PB4 | 1<<PB3 | 1<<PB1 | 1<<PB0);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Column pin configuration
|
||||||
|
* col: 0 1 2 3 4 5 6 7 8 9 10 11 12 13
|
||||||
|
* revC pin: F0 F1 E6 C7 C6 B7 D4 B1 B0 B5 B4 D7 D6 B3
|
||||||
|
* revB pin: F0 F1 E6 C7 C6 B6 D4 B1 B7 B5 B4 D7 D6 B3
|
||||||
|
* revA pin: F0 F1 E6 C7 C6 B6 D4 B1 B0 B5 B4 D7 D6 B3
|
||||||
|
*/
|
||||||
static matrix_row_t read_cols(void)
|
static matrix_row_t read_cols(void)
|
||||||
{
|
{
|
||||||
return (PINF&(1<<0) ? 0 : (1<<0)) |
|
#if defined(GH60_REV_C)
|
||||||
(PINF&(1<<1) ? 0 : (1<<1)) |
|
return (PINF&(1<<PF0) ? 0 : (1<<0)) |
|
||||||
(PINE&(1<<6) ? 0 : (1<<2)) |
|
(PINF&(1<<PF1) ? 0 : (1<<1)) |
|
||||||
(PINC&(1<<7) ? 0 : (1<<3)) |
|
(PINE&(1<<PE6) ? 0 : (1<<2)) |
|
||||||
(PINC&(1<<6) ? 0 : (1<<4)) |
|
(PINC&(1<<PC7) ? 0 : (1<<3)) |
|
||||||
(PINB&(1<<6) ? 0 : (1<<5)) |
|
(PINC&(1<<PC6) ? 0 : (1<<4)) |
|
||||||
(PIND&(1<<4) ? 0 : (1<<6)) |
|
(PINB&(1<<PB7) ? 0 : (1<<5)) |
|
||||||
(PINB&(1<<1) ? 0 : (1<<7)) |
|
(PIND&(1<<PD4) ? 0 : (1<<6)) |
|
||||||
(PINB&(1<<0) ? 0 : (1<<8)) |
|
(PINB&(1<<PB1) ? 0 : (1<<7)) |
|
||||||
(PINB&(1<<5) ? 0 : (1<<9)) |
|
(PINB&(1<<PB0) ? 0 : (1<<8)) |
|
||||||
(PINB&(1<<4) ? 0 : (1<<10)) |
|
(PINB&(1<<PB5) ? 0 : (1<<9)) |
|
||||||
(PIND&(1<<7) ? 0 : (1<<11)) |
|
(PINB&(1<<PB4) ? 0 : (1<<10)) |
|
||||||
(PIND&(1<<6) ? 0 : (1<<12)) |
|
(PIND&(1<<PD7) ? 0 : (1<<11)) |
|
||||||
(PINB&(1<<3) ? 0 : (1<<13));
|
(PIND&(1<<PD6) ? 0 : (1<<12)) |
|
||||||
|
(PINB&(1<<PB3) ? 0 : (1<<13));
|
||||||
|
#elif defined(GH60_REV_B)
|
||||||
|
return (PINF&(1<<PF0) ? 0 : (1<<0)) |
|
||||||
|
(PINF&(1<<PF1) ? 0 : (1<<1)) |
|
||||||
|
(PINE&(1<<PE6) ? 0 : (1<<2)) |
|
||||||
|
(PINC&(1<<PC7) ? 0 : (1<<3)) |
|
||||||
|
(PINC&(1<<PC6) ? 0 : (1<<4)) |
|
||||||
|
(PINB&(1<<PB6) ? 0 : (1<<5)) |
|
||||||
|
(PIND&(1<<PD4) ? 0 : (1<<6)) |
|
||||||
|
(PINB&(1<<PB1) ? 0 : (1<<7)) |
|
||||||
|
(PINB&(1<<PB7) ? 0 : (1<<8)) |
|
||||||
|
(PINB&(1<<PB5) ? 0 : (1<<9)) |
|
||||||
|
(PINB&(1<<PB4) ? 0 : (1<<10)) |
|
||||||
|
(PIND&(1<<PD7) ? 0 : (1<<11)) |
|
||||||
|
(PIND&(1<<PD6) ? 0 : (1<<12)) |
|
||||||
|
(PINB&(1<<PB3) ? 0 : (1<<13));
|
||||||
|
#else
|
||||||
|
return (PINF&(1<<PF0) ? 0 : (1<<0)) |
|
||||||
|
(PINF&(1<<PF1) ? 0 : (1<<1)) |
|
||||||
|
(PINE&(1<<PF6) ? 0 : (1<<2)) |
|
||||||
|
(PINC&(1<<PC7) ? 0 : (1<<3)) |
|
||||||
|
(PINC&(1<<PC6) ? 0 : (1<<4)) |
|
||||||
|
(PINB&(1<<PB6) ? 0 : (1<<5)) |
|
||||||
|
(PIND&(1<<PD4) ? 0 : (1<<6)) |
|
||||||
|
(PINB&(1<<PB1) ? 0 : (1<<7)) |
|
||||||
|
(PINB&(1<<PB0) ? 0 : (1<<8)) |
|
||||||
|
(PINB&(1<<PB5) ? 0 : (1<<9)) |
|
||||||
|
(PINB&(1<<PB4) ? 0 : (1<<10)) |
|
||||||
|
(PIND&(1<<PF7) ? 0 : (1<<11)) |
|
||||||
|
(PIND&(1<<PF6) ? 0 : (1<<12)) |
|
||||||
|
(PINB&(1<<PF3) ? 0 : (1<<13));
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Row pin configuration
|
/* Row pin configuration
|
||||||
|
Reference in New Issue
Block a user