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kimera.h 5.3KB

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  1. /*
  2. Copyright 2014 Kai Ryu <[email protected]>
  3. This program is free software: you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation, either version 2 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with this program. If not, see <http://www.gnu.org/licenses/>.
  13. */
  14. #ifndef KIMERA_H
  15. #define KIMERA_H
  16. #include <stdint.h>
  17. #include <avr/pgmspace.h>
  18. #include "matrix.h"
  19. /*
  20. Pro Micro
  21. ,----------------.
  22. TX --| TX0(PD3) RAW |--
  23. RX --| RX1(PD2) GND |--
  24. --| GND RESET |-- RST
  25. --| GND VCC |--
  26. SDA --| 2(PD1) (PF4)A3 |-- (Z4)
  27. SCL --| 3(PD0) (PF5)A2 |-- (Z1)
  28. (RCK) --| 4(PD4) (PF6)A1 |-- (Z2)
  29. LED1 --| 5(PC6) (PF7)A0 |-- (Z3)
  30. LED2 --| 6(PD7) (PB1)15 |-- SCK
  31. (SJ1) --| 7(PE6) (PB3)14 |-- MISO
  32. (SJ2) --| 8(PB4) (PB2)16 |-- MOSI
  33. BL --| 9(PB5) (PB6)10 |-- LED3
  34. `----------------'
  35. */
  36. #define LED1_PORT PORTC
  37. #define LED1_PIN PINC
  38. #define LED1_DDR DDRC
  39. #define LED1_BIT PC6
  40. #define LED2_PORT PORTD
  41. #define LED2_PIN PIND
  42. #define LED2_DDR DDRD
  43. #define LED2_BIT PD7
  44. #define LED3_PORT PORTB
  45. #define LED3_PIN PINB
  46. #define LED3_DDR DDRB
  47. #define LED3_BIT PB6
  48. #define BL_PORT PORTB
  49. #define BL_PIN PINB
  50. #define BL_DDR DDRB
  51. #define BL_BIT PB5
  52. #define BL_OCR OCR1A
  53. #define RCK_PORT PORTD
  54. #define RCK_PIN PIND
  55. #define RCK_DDR DDRD
  56. #define RCK_BIT PD4
  57. #define SCK_PORT PORTB
  58. #define SCK_PIN PINB
  59. #define SCK_DDR DDRB
  60. #define SCK_BIT PB1
  61. #define MOSI_PORT PORTB
  62. #define MOSI_PIN PINB
  63. #define MOSI_DDR DDRB
  64. #define MOSI_BIT PB2
  65. #define MISO_PORT PORTB
  66. #define MISO_PIN PINB
  67. #define MISO_DDR DDRB
  68. #define MISO_BIT PB3
  69. #define ZX_PORT PORTF
  70. #define ZX_PIN PINF
  71. #define ZX_DDR DDRF
  72. #ifdef KIMERA_C
  73. const uint8_t PROGMEM zx_bit[] = {
  74. PF5, PF6, PF7, PF4
  75. };
  76. #endif
  77. /*
  78. Shift Register Multiplexer
  79. ,----------. ,------------.
  80. MOSI --| SER 0 |----| INH X0~X7 |===============.
  81. SCK --|>SCK 1 |----| A | |
  82. RCK --|>RCK 2 |----| B | ,-------------+-------------.
  83. | 3 |----| C | | | | | | | | |
  84. | | `------------' P26 P27 P28 P25 P29 P32 P30 P31
  85. | | ,------------.
  86. | 4 |----| A X0~X7 |===============.
  87. | 5 |----| B | |
  88. | 6 |----| C | ,-------------+-------------.
  89. | 7 |----| INH | | | | | | | | |
  90. | | `------------' P2 P3 P4 P1 P5 P8 P6 P7
  91. | | ,------------.
  92. | 8 |----| INH X0~X7 |===============.
  93. | 9 |----| A | |
  94. | 10 |----| B | ,-------------+-------------.
  95. | 11 |----| C | | | | | | | | |
  96. | | `------------' P10 P11 P12 P9 P13 P16 P14 P15
  97. | | ,------------.
  98. | 12 |----| A X0~X7 |===============.
  99. | 13 |----| B | |
  100. | 14 |----| C | ,-------------+-------------.
  101. | 15 |----| INH | | | | | | | | |
  102. `----------' `------------' P18 P19 P20 P17 P21 P24 P22 P23
  103. */
  104. #define MUX_COUNT 4
  105. #define MUX_PORTS 8
  106. #define PX_TO_MUX(x) (x>>3) // (x / MUX_PORTS)
  107. enum {
  108. MUX4_INH = 0,
  109. MUX4_A,
  110. MUX4_B,
  111. MUX4_C,
  112. MUX1_A,
  113. MUX1_B,
  114. MUX1_C,
  115. MUX1_INH,
  116. MUX2_INH,
  117. MUX2_A,
  118. MUX2_B,
  119. MUX2_C,
  120. MUX3_A,
  121. MUX3_B,
  122. MUX3_C,
  123. MUX3_INH
  124. };
  125. #ifdef KIMERA_C
  126. const uint16_t PROGMEM px_to_shift_out[] = {
  127. 3<<MUX1_A, 0<<MUX1_A, 1<<MUX1_A, 2<<MUX1_A, 4<<MUX1_A, 6<<MUX1_A, 7<<MUX1_A, 5<<MUX1_A,
  128. 3<<MUX2_A, 0<<MUX2_A, 1<<MUX2_A, 2<<MUX2_A, 4<<MUX2_A, 6<<MUX2_A, 7<<MUX2_A, 5<<MUX2_A,
  129. 3<<MUX3_A, 0<<MUX3_A, 1<<MUX3_A, 2<<MUX3_A, 4<<MUX3_A, 6<<MUX3_A, 7<<MUX3_A, 5<<MUX3_A,
  130. 3<<MUX4_A, 0<<MUX4_A, 1<<MUX4_A, 2<<MUX4_A, 4<<MUX4_A, 6<<MUX4_A, 7<<MUX4_A, 5<<MUX4_A
  131. };
  132. const uint16_t PROGMEM mux_inh_to_shift_out[] = {
  133. 1<<MUX1_INH, 1<<MUX2_INH, 1<<MUX3_INH, 1<<MUX4_INH
  134. };
  135. #endif
  136. /* Matrix Mapping in EEPROM */
  137. #define EECONFIG_MUX_MAPPING (uint8_t *)7
  138. #define EECONFIG_ROW_COL_MAPPING (uint8_t *)8
  139. #define MATRIX_MAPPING_SIZE MUX_COUNT * MUX_PORTS
  140. #define EECONFIG_KEYMAP_IN_EEPROM 40
  141. typedef struct {
  142. uint8_t mux_mapping;
  143. uint8_t row_col_mapping;
  144. } matrix_mapping_t;
  145. #define MUX_INPUT 0
  146. #define MUX_OUTPUT 1
  147. #define MUX_FOR_COL MUX_INPUT
  148. #define MUX_FOR_ROW MUX_OUTPUT
  149. #define UNCONFIGURED 0xFF
  150. /* Functions */
  151. void kimera_init(void);
  152. uint8_t read_matrix_mapping(void);
  153. void write_matrix_mapping(void);
  154. void shift_out_word(uint16_t word);
  155. matrix_row_t read_cols(void);
  156. void init_cols(void);
  157. void unselect_rows(void);
  158. void select_row(uint8_t row);
  159. #endif