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k20dx32_flash.cfg 2.9KB

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  1. # FreeScale Kinetis K20 devices with 32kB Flash and 8kB Local On-Chip SRAM,
  2. # Nemuisan's Special for MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5
  3. source [find target/swj-dp.tcl]
  4. if { [info exists CHIPNAME] } {
  5. set _CHIPNAME $CHIPNAME
  6. } else {
  7. set _CHIPNAME k20
  8. }
  9. if { [info exists ENDIAN] } {
  10. set _ENDIAN $ENDIAN
  11. } else {
  12. set _ENDIAN little
  13. }
  14. if { [info exists CPUTAPID] } {
  15. set _CPUTAPID $CPUTAPID
  16. } else {
  17. if { [using_jtag] } {
  18. set _CPUTAPID 0x4BA00477
  19. } {
  20. # this is the SW-DP tap id not the jtag tap id
  21. set _CPUTAPID 0x2BA01477
  22. }
  23. }
  24. # Work-area is a space in RAM used for flash programming
  25. # By default use 8kB
  26. if { [info exists WORKAREASIZE] == 0 } {
  27. set _WORKAREASIZE 0x2000
  28. }
  29. # Select "srst_only", Nemuisan said so!
  30. echo "Kinetis MUST need Hardware SRST Control to Recover Secure-State!"
  31. adapter_nsrst_delay 200
  32. reset_config srst_only
  33. swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  34. set _TARGETNAME $_CHIPNAME.cpu
  35. target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
  36. # It is important that "kinetis mdm check_security" is called for
  37. # 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
  38. # causes "kinetis mdm check_security" to fail the first time openocd
  39. # calls it when it tries to connect after the CPU has been power-cycled.
  40. $_CHIPNAME.cpu configure -event examine-end {
  41. kinetis mdm check_security
  42. # Uncomment when gone into s*ck'n secured state!
  43. # kinetis mdm mass_erase
  44. }
  45. # K20 has minimun 8kB of SRAM and starts at 1FFFF000.
  46. $_TARGETNAME configure -work-area-phys 0x1FFFF000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -rtos auto
  47. # MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 has 32kB of flash memory.
  48. flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x8000 0 4 $_TARGETNAME
  49. proc mt_flash {IMGFILE} {
  50. flash write_image erase $IMGFILE
  51. reset run
  52. halt
  53. verify_image $IMGFILE
  54. reset run
  55. shutdown
  56. }
  57. proc mt_flash_bin {IMGFILE OFFSET} {
  58. flash write_image erase $IMGFILE $OFFSET bin
  59. reset run
  60. halt
  61. verify_image $IMGFILE $OFFSET bin
  62. reset run
  63. shutdown
  64. }
  65. proc mt_flash_hex {IMGFILE} {
  66. flash write_image erase $IMGFILE 0 ihex
  67. reset run
  68. halt
  69. verify_image $IMGFILE 0 ihex
  70. reset run
  71. shutdown
  72. }
  73. proc mt_flash_srec {IMGFILE} {
  74. flash write_image erase $IMGFILE 0 s19
  75. reset run
  76. halt
  77. verify_image $IMGFILE 0 s19
  78. reset run
  79. shutdown
  80. }
  81. proc mass_erase {} {
  82. kinetis mdm mass_erase
  83. }
  84. proc eraser {} {
  85. # Verbose procedure confirmed erase routine
  86. flash info 0
  87. # CAUTION! "flash erase_sector 0 0 last" goes into secure state!!!
  88. # USE "mass_erase" command instead of
  89. # flash erase_sector 0 0 last
  90. mass_erase
  91. shutdown
  92. }
  93. #debug_level 3
  94. # HLA doesn't have cortex_m commands
  95. if {![using_hla]} {
  96. # if srst is not fitted use SYSRESETREQ to
  97. # perform a soft reset
  98. cortex_m reset_config sysresetreq
  99. }
  100. adapter_khz 1000
  101. reset_config srst_only srst_nogate connect_assert_srst
  102. gdb_target_description disable
  103. init
  104. reset init