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config.h 4.5KB

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  1. /*
  2. Copyright 2012 Jun Wako <[email protected]>
  3. This program is free software: you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation, either version 2 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with this program. If not, see <http://www.gnu.org/licenses/>.
  13. */
  14. #ifndef CONFIG_H
  15. #define CONFIG_H
  16. #define VENDOR_ID 0xFEED
  17. #define PRODUCT_ID 0x9898
  18. #define DEVICE_VER 0x0100
  19. #define MANUFACTURER t.m.k.
  20. #define PRODUCT PC98 keyboard converter
  21. #define DESCRIPTION converts PC98 keyboard protocol into USB
  22. /* matrix size */
  23. #define MATRIX_ROWS 16
  24. #define MATRIX_COLS 8
  25. /* To use new keymap framework */
  26. #define USE_KEYMAP_V2
  27. /* key combination for command */
  28. #define IS_COMMAND() ( \
  29. host_get_first_key() == KC_CANCEL \
  30. )
  31. /* PC98 Reset Port shared with TXD */
  32. #define PC98_RST_DDR DDRD
  33. #define PC98_RST_PORT PORTD
  34. #define PC98_RST_BIT 3
  35. /* PC98 Ready Port */
  36. #define PC98_RDY_DDR DDRD
  37. #define PC98_RDY_PORT PORTD
  38. #define PC98_RDY_BIT 4
  39. /* PC98 Retry Port */
  40. #define PC98_RTY_DDR DDRD
  41. #define PC98_RTY_PORT PORTD
  42. #define PC98_RTY_BIT 5
  43. /*
  44. * PC98 Serial(USART) configuration
  45. * asynchronous, positive logic, 19200baud, bit order: LSB first
  46. * 1-start bit, 8-data bit, odd parity, 1-stop bit
  47. */
  48. /*
  49. * Software Serial
  50. */
  51. #define SERIAL_SOFT_BAUD 19200
  52. #define SERIAL_SOFT_PARITY_ODD
  53. #define SERIAL_SOFT_BIT_ORDER_LSB
  54. #define SERIAL_SOFT_LOGIC_POSITIVE
  55. /* RXD Port */
  56. #define SERIAL_SOFT_RXD_DDR DDRD
  57. #define SERIAL_SOFT_RXD_PORT PORTD
  58. #define SERIAL_SOFT_RXD_PIN PIND
  59. #define SERIAL_SOFT_RXD_BIT 2
  60. #ifdef SERIAL_SOFT_LOGIC_NEGATIVE
  61. #define SERIAL_SOFT_RXD_READ() ~(SERIAL_SOFT_RXD_PIN&(1<<SERIAL_SOFT_RXD_BIT))
  62. #else
  63. #define SERIAL_SOFT_RXD_READ() (SERIAL_SOFT_RXD_PIN&(1<<SERIAL_SOFT_RXD_BIT))
  64. #endif
  65. /* RXD Interupt */
  66. #define SERIAL_SOFT_RXD_VECT INT2_vect
  67. #define SERIAL_SOFT_RXD_INIT() do { \
  68. /* pin configuration: input with pull-up */ \
  69. SERIAL_SOFT_RXD_DDR &= ~(1<<SERIAL_SOFT_RXD_BIT); \
  70. SERIAL_SOFT_RXD_PORT |= (1<<SERIAL_SOFT_RXD_BIT); \
  71. /* enable interrupt: INT2(falling edge) */ \
  72. EICRA |= ((1<<ISC21)|(0<<ISC20)); \
  73. EIMSK |= (1<<INT2); \
  74. sei(); \
  75. } while (0)
  76. #define SERIAL_SOFT_RXD_INT_ENTER()
  77. #define SERIAL_SOFT_RXD_INT_EXIT() do { \
  78. /* clear interrupt flag */ \
  79. EIFR = (1<<INTF2); \
  80. } while (0)
  81. /* TXD Port */
  82. #define SERIAL_SOFT_TXD_DDR DDRD
  83. #define SERIAL_SOFT_TXD_PORT PORTD
  84. #define SERIAL_SOFT_TXD_PIN PIND
  85. #define SERIAL_SOFT_TXD_BIT 3
  86. #ifdef SERIAL_SOFT_LOGIC_NEGATIVE
  87. #define SERIAL_SOFT_TXD_ON() do { \
  88. SERIAL_SOFT_TXD_PORT &= ~(1<<SERIAL_SOFT_TXD_BIT); \
  89. } while (0)
  90. #define SERIAL_SOFT_TXD_OFF() do { \
  91. SERIAL_SOFT_TXD_PORT |= (1<<SERIAL_SOFT_TXD_BIT); \
  92. } while (0)
  93. #else
  94. #define SERIAL_SOFT_TXD_ON() do { \
  95. SERIAL_SOFT_TXD_PORT |= (1<<SERIAL_SOFT_TXD_BIT); \
  96. } while (0)
  97. #define SERIAL_SOFT_TXD_OFF() do { \
  98. SERIAL_SOFT_TXD_PORT &= ~(1<<SERIAL_SOFT_TXD_BIT); \
  99. } while (0)
  100. #endif
  101. #define SERIAL_SOFT_TXD_INIT() do { \
  102. /* pin configuration: output */ \
  103. SERIAL_SOFT_TXD_DDR |= (1<<SERIAL_SOFT_TXD_BIT); \
  104. /* idle */ \
  105. SERIAL_SOFT_TXD_ON(); \
  106. } while (0)
  107. /*
  108. * Hardware Serial(UART)
  109. */
  110. #ifdef __AVR_ATmega32U4__
  111. #define SERIAL_UART_BAUD 19200
  112. #define SERIAL_UART_DATA UDR1
  113. #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
  114. #define SERIAL_UART_RXD_VECT USART1_RX_vect
  115. #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
  116. #define SERIAL_UART_INIT() do { \
  117. UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
  118. UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
  119. UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
  120. UCSR1B |= (0<<TXCIE1) | (1<<TXEN1); /* TX interrupt, TX: enable */ \
  121. UCSR1C |= (1<<UPM11) | (1<<UPM10); /* parity: none(00), even(01), odd(11) */ \
  122. sei(); \
  123. } while(0)
  124. #else
  125. #error "USART configuration is needed."
  126. #endif
  127. #endif