87e7029039
Initial upload
561 lines
17 KiB
C
561 lines
17 KiB
C
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#include "stm32f4xx_hal.h"
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#include "lwip/opt.h"
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#include "lwip/timers.h"
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#include "netif/etharp.h"
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#include "lwip/tcpip.h"
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#include <string.h>
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#include "cmsis_os.h"
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#include "mbed_interface.h"
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/** @defgroup lwipstm32f4xx_emac_DRIVER stm32f4 EMAC driver for LWIP
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* @ingroup lwip_emac
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*
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* @{
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*/
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#define RECV_TASK_PRI (osPriorityHigh)
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#define PHY_TASK_PRI (osPriorityLow)
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#define PHY_TASK_WAIT (200)
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx MA Descriptor */
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
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ETH_HandleTypeDef heth;
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static sys_sem_t rx_ready_sem; /* receive ready semaphore */
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static sys_mutex_t tx_lock_mutex;
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/* function */
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static void stm32f4_rx_task(void *arg);
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static void stm32f4_phy_task(void *arg);
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static err_t stm32f4_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr);
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static err_t stm32f4_low_level_output(struct netif *netif, struct pbuf *p);
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/**
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* Override HAL Eth Init function
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*/
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void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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if (heth->Instance == ETH) {
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/* Peripheral clock enable */
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__ETH_CLK_ENABLE();
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__GPIOA_CLK_ENABLE();
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__GPIOB_CLK_ENABLE();
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__GPIOC_CLK_ENABLE();
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/**ETH GPIO Configuration
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PC1 ------> ETH_MDC
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PA1 ------> ETH_REF_CLK
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PA2 ------> ETH_MDIO
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PA7 ------> ETH_CRS_DV
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PC4 ------> ETH_RXD0
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PC5 ------> ETH_RXD1
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PB11 ------> ETH_TX_EN
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PB12 ------> ETH_TXD0
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PB13 ------> ETH_TXD1
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* Peripheral interrupt init*/
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/* Sets the priority grouping field */
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HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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HAL_NVIC_SetPriority(ETH_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(ETH_IRQn);
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}
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}
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/**
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* Override HAL Eth DeInit function
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*/
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void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
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{
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if (heth->Instance == ETH) {
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/* Peripheral clock disable */
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__ETH_CLK_DISABLE();
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/**ETH GPIO Configuration
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PC1 ------> ETH_MDC
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PA1 ------> ETH_REF_CLK
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PA2 ------> ETH_MDIO
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PA7 ------> ETH_CRS_DV
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PC4 ------> ETH_RXD0
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PC5 ------> ETH_RXD1
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PB11 ------> ETH_TX_EN
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PB12 ------> ETH_TXD0
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PB13 ------> ETH_TXD1
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*/
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
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/* Peripheral interrupt Deinit*/
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HAL_NVIC_DisableIRQ(ETH_IRQn);
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}
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}
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/**
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* Ethernet Rx Transfer completed callback
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*
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* @param heth: ETH handle
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* @retval None
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*/
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void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
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{
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sys_sem_signal(&rx_ready_sem);
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}
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/**
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* Ethernet IRQ Handler
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*
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* @param None
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* @retval None
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*/
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void ETH_IRQHandler(void)
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{
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HAL_ETH_IRQHandler(&heth);
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}
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/**
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* In this function, the hardware should be initialized.
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* Called from eth_arch_enetif_init().
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*
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* @param netif the already initialized lwip network interface structure
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* for this ethernetif
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*/
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static void stm32f4_low_level_init(struct netif *netif)
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{
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uint32_t regvalue = 0;
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HAL_StatusTypeDef hal_eth_init_status;
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/* Init ETH */
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uint8_t MACAddr[6];
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heth.Instance = ETH;
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heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
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heth.Init.Speed = ETH_SPEED_10M;
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heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
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heth.Init.PhyAddress = 1;
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#if (MBED_MAC_ADDRESS_SUM != MBED_MAC_ADDR_INTERFACE)
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MACAddr[0] = MBED_MAC_ADDR_0;
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MACAddr[1] = MBED_MAC_ADDR_1;
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MACAddr[2] = MBED_MAC_ADDR_2;
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MACAddr[3] = MBED_MAC_ADDR_3;
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MACAddr[4] = MBED_MAC_ADDR_4;
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MACAddr[5] = MBED_MAC_ADDR_5;
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#else
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mbed_mac_address((char *)MACAddr);
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#endif
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heth.Init.MACAddr = &MACAddr[0];
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heth.Init.RxMode = ETH_RXINTERRUPT_MODE;
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heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
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heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
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hal_eth_init_status = HAL_ETH_Init(&heth);
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if (hal_eth_init_status == HAL_OK) {
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/* Set netif link flag */
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netif->flags |= NETIF_FLAG_LINK_UP;
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}
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/* Initialize Tx Descriptors list: Chain Mode */
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HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
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/* Initialize Rx Descriptors list: Chain Mode */
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HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
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#if LWIP_ARP || LWIP_ETHERNET
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/* set MAC hardware address length */
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netif->hwaddr_len = ETHARP_HWADDR_LEN;
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/* set MAC hardware address */
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netif->hwaddr[0] = heth.Init.MACAddr[0];
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netif->hwaddr[1] = heth.Init.MACAddr[1];
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netif->hwaddr[2] = heth.Init.MACAddr[2];
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netif->hwaddr[3] = heth.Init.MACAddr[3];
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netif->hwaddr[4] = heth.Init.MACAddr[4];
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netif->hwaddr[5] = heth.Init.MACAddr[5];
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/* maximum transfer unit */
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netif->mtu = 1500;
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/* device capabilities */
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/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
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netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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/* Enable MAC and DMA transmission and reception */
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HAL_ETH_Start(&heth);
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/**** Configure PHY to generate an interrupt when Eth Link state changes ****/
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/* Read Register Configuration */
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HAL_ETH_ReadPHYRegister(&heth, PHY_MICR, ®value);
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regvalue |= (PHY_MICR_INT_EN | PHY_MICR_INT_OE);
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/* Enable Interrupts */
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HAL_ETH_WritePHYRegister(&heth, PHY_MICR, regvalue);
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/* Read Register Configuration */
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HAL_ETH_ReadPHYRegister(&heth, PHY_MISR, ®value);
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regvalue |= PHY_MISR_LINK_INT_EN;
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/* Enable Interrupt on change of link status */
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HAL_ETH_WritePHYRegister(&heth, PHY_MISR, regvalue);
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#endif
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}
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/**
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* This function should do the actual transmission of the packet. The packet is
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* contained in the pbuf that is passed to the function. This pbuf
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* might be chained.
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*
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* @param netif the lwip network interface structure for this ethernetif
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* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
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* @return ERR_OK if the packet could be sent
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* an err_t value if the packet couldn't be sent
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*
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* @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
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* strange results. You might consider waiting for space in the DMA queue
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* to become availale since the stack doesn't retry to send a packet
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* dropped because of memory failure (except for the TCP timers).
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*/
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static err_t stm32f4_low_level_output(struct netif *netif, struct pbuf *p)
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{
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err_t errval;
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struct pbuf *q;
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uint8_t *buffer = (uint8_t*)(heth.TxDesc->Buffer1Addr);
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__IO ETH_DMADescTypeDef *DmaTxDesc;
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uint32_t framelength = 0;
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uint32_t bufferoffset = 0;
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uint32_t byteslefttocopy = 0;
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uint32_t payloadoffset = 0;
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DmaTxDesc = heth.TxDesc;
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bufferoffset = 0;
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sys_mutex_lock(&tx_lock_mutex);
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/* copy frame from pbufs to driver buffers */
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for (q = p; q != NULL; q = q->next) {
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/* Is this buffer available? If not, goto error */
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if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
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errval = ERR_USE;
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goto error;
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}
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/* Get bytes in current lwIP buffer */
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byteslefttocopy = q->len;
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payloadoffset = 0;
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/* Check if the length of data to copy is bigger than Tx buffer size*/
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while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE) {
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/* Copy data to Tx buffer*/
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memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
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/* Point to next descriptor */
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DmaTxDesc = (ETH_DMADescTypeDef*)(DmaTxDesc->Buffer2NextDescAddr);
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/* Check if the buffer is available */
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if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
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errval = ERR_USE;
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goto error;
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}
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buffer = (uint8_t*)(DmaTxDesc->Buffer1Addr);
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byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
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payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
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framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
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bufferoffset = 0;
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}
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/* Copy the remaining bytes */
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memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy);
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bufferoffset = bufferoffset + byteslefttocopy;
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framelength = framelength + byteslefttocopy;
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}
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/* Prepare transmit descriptors to give to DMA */
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HAL_ETH_TransmitFrame(&heth, framelength);
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errval = ERR_OK;
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error:
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/* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
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if ((heth.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET) {
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/* Clear TUS ETHERNET DMA flag */
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heth.Instance->DMASR = ETH_DMASR_TUS;
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/* Resume DMA transmission*/
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heth.Instance->DMATPDR = 0;
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}
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sys_mutex_unlock(&tx_lock_mutex);
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return errval;
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}
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/**
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* Should allocate a pbuf and transfer the bytes of the incoming
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* packet from the interface into the pbuf.
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*
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* @param netif the lwip network interface structure for this ethernetif
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* @return a pbuf filled with the received packet (including MAC header)
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* NULL on memory error
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*/
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static struct pbuf * stm32f4_low_level_input(struct netif *netif)
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{
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struct pbuf *p = NULL;
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struct pbuf *q;
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uint16_t len = 0;
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uint8_t *buffer;
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__IO ETH_DMADescTypeDef *dmarxdesc;
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uint32_t bufferoffset = 0;
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uint32_t payloadoffset = 0;
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uint32_t byteslefttocopy = 0;
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uint32_t i = 0;
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/* get received frame */
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if (HAL_ETH_GetReceivedFrame(&heth) != HAL_OK)
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return NULL;
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/* Obtain the size of the packet and put it into the "len" variable. */
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len = heth.RxFrameInfos.length;
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buffer = (uint8_t*)heth.RxFrameInfos.buffer;
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if (len > 0) {
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/* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
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p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
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}
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if (p != NULL) {
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dmarxdesc = heth.RxFrameInfos.FSRxDesc;
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bufferoffset = 0;
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for (q = p; q != NULL; q = q->next) {
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byteslefttocopy = q->len;
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payloadoffset = 0;
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/* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
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while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE) {
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/* Copy data to pbuf */
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memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
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/* Point to next descriptor */
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dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
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buffer = (uint8_t*)(dmarxdesc->Buffer1Addr);
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byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
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payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
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bufferoffset = 0;
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}
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/* Copy remaining data in pbuf */
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memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
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bufferoffset = bufferoffset + byteslefttocopy;
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}
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/* Release descriptors to DMA */
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/* Point to first descriptor */
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dmarxdesc = heth.RxFrameInfos.FSRxDesc;
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/* Set Own bit in Rx descriptors: gives the buffers back to DMA */
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for (i = 0; i < heth.RxFrameInfos.SegCount; i++) {
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dmarxdesc->Status |= ETH_DMARXDESC_OWN;
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dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
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}
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/* Clear Segment_Count */
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heth.RxFrameInfos.SegCount = 0;
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}
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/* When Rx Buffer unavailable flag is set: clear it and resume reception */
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if ((heth.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) {
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/* Clear RBUS ETHERNET DMA flag */
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heth.Instance->DMASR = ETH_DMASR_RBUS;
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/* Resume DMA reception */
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heth.Instance->DMARPDR = 0;
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}
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return p;
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}
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/**
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* This task receives input data
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*
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* \param[in] netif the lwip network interface structure
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*/
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static void stm32f4_rx_task(void *arg)
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{
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struct netif *netif = (struct netif*)arg;
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struct pbuf *p;
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while (1) {
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sys_arch_sem_wait(&rx_ready_sem, 0);
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p = stm32f4_low_level_input(netif);
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if (p != NULL) {
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if (netif->input(p, netif) != ERR_OK) {
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pbuf_free(p);
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p = NULL;
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}
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}
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}
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}
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/**
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* This task checks phy link status and updates net status
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*
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* \param[in] netif the lwip network interface structure
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*/
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static void stm32f4_phy_task(void *arg)
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{
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struct netif *netif = (struct netif*)arg;
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uint32_t phy_status = 0;
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while (1) {
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uint32_t status;
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if (HAL_ETH_ReadPHYRegister(&heth, PHY_SR, &status) == HAL_OK) {
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if ((status & PHY_LINK_STATUS) && !(phy_status & PHY_LINK_STATUS)) {
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tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1);
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} else if (!(status & PHY_LINK_STATUS) && (phy_status & PHY_LINK_STATUS)) {
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tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1);
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}
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phy_status = status;
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}
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osDelay(PHY_TASK_WAIT);
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}
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}
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/**
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* This function is the ethernet packet send function. It calls
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* etharp_output after checking link status.
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*
|
|
* \param[in] netif the lwip network interface structure for this lpc_enetif
|
|
* \param[in] q Pointer to pbug to send
|
|
* \param[in] ipaddr IP address
|
|
* \return ERR_OK or error code
|
|
*/
|
|
static err_t stm32f4_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr)
|
|
{
|
|
/* Only send packet is link is up */
|
|
if (netif->flags & NETIF_FLAG_LINK_UP) {
|
|
return etharp_output(netif, q, ipaddr);
|
|
}
|
|
|
|
return ERR_CONN;
|
|
}
|
|
|
|
/**
|
|
* Should be called at the beginning of the program to set up the
|
|
* network interface.
|
|
*
|
|
* This function should be passed as a parameter to netif_add().
|
|
*
|
|
* @param[in] netif the lwip network interface structure for this lpc_enetif
|
|
* @return ERR_OK if the loopif is initialized
|
|
* ERR_MEM if private data couldn't be allocated
|
|
* any other err_t on error
|
|
*/
|
|
err_t eth_arch_enetif_init(struct netif *netif)
|
|
{
|
|
/* set MAC hardware address */
|
|
netif->hwaddr_len = ETHARP_HWADDR_LEN;
|
|
|
|
/* maximum transfer unit */
|
|
netif->mtu = 1500;
|
|
|
|
/* device capabilities */
|
|
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP;
|
|
|
|
#if LWIP_NETIF_HOSTNAME
|
|
/* Initialize interface hostname */
|
|
netif->hostname = "lwipstm32f4";
|
|
#endif /* LWIP_NETIF_HOSTNAME */
|
|
|
|
netif->name[0] = 'e';
|
|
netif->name[1] = 'n';
|
|
|
|
netif->output = stm32f4_etharp_output;
|
|
netif->linkoutput = stm32f4_low_level_output;
|
|
|
|
/* semaphore */
|
|
sys_sem_new(&rx_ready_sem, 0);
|
|
|
|
sys_mutex_new(&tx_lock_mutex);
|
|
|
|
/* task */
|
|
sys_thread_new("stm32f4_recv_task", stm32f4_rx_task, netif, DEFAULT_THREAD_STACKSIZE, RECV_TASK_PRI);
|
|
sys_thread_new("stm32f4_phy_task", stm32f4_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI);
|
|
|
|
/* initialize the hardware */
|
|
stm32f4_low_level_init(netif);
|
|
|
|
return ERR_OK;
|
|
}
|
|
|
|
void eth_arch_enable_interrupts(void)
|
|
{
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
HAL_NVIC_SetPriority(ETH_IRQn, 0, 0);
|
|
HAL_NVIC_EnableIRQ(ETH_IRQn);
|
|
}
|
|
|
|
void eth_arch_disable_interrupts(void)
|
|
{
|
|
NVIC_DisableIRQ(ETH_IRQn);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* --------------------------------- End Of File ------------------------------ */
|